1 /* SPDX-License-Identifier: MIT */
2 /*
3  * Copyright 2023 Advanced Micro Devices, Inc.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9  * and/or sell copies of the Software, and to permit persons to whom the
10  * Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice shall be included in
13  * all copies or substantial portions of the Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21  * OTHER DEALINGS IN THE SOFTWARE.
22  *
23  * Authors: AMD
24  *
25  */
26 
27 #ifndef __DCN35_DSC_H__
28 #define __DCN35_DSC_H__
29 
30 #include "dcn20/dcn20_dsc.h"
31 
32 #define DSC_REG_LIST_SH_MASK_DCN35(mask_sh)  \
33 	DSC_REG_LIST_SH_MASK_DCN20(mask_sh), \
34 		DSC_SF(DSC_TOP0_DSC_TOP_CONTROL, DSC_FGCG_REP_DIS, mask_sh)
35 
36 #define DSC_FIELD_LIST_DCN35(type)          \
37 	struct {                            \
38 		DSC_FIELD_LIST_DCN20(type); \
39 		type DSC_FGCG_REP_DIS;      \
40 	}
41 
42 struct dcn35_dsc_shift {
43 	DSC_FIELD_LIST_DCN35(uint8_t);
44 };
45 
46 struct dcn35_dsc_mask {
47 	DSC_FIELD_LIST_DCN35(uint32_t);
48 };
49 
50 void dsc35_construct(struct dcn20_dsc *dsc,
51 		struct dc_context *ctx,
52 		int inst,
53 		const struct dcn20_dsc_registers *dsc_regs,
54 		const struct dcn35_dsc_shift *dsc_shift,
55 		const struct dcn35_dsc_mask *dsc_mask);
56 
57 void dsc35_set_fgcg(struct dcn20_dsc *dsc20, bool enable);
58 
59 #endif /* __DCN35_DSC_H__ */
60