1 /* Copyright 2021 Advanced Micro Devices, Inc. 2 * 3 * Permission is hereby granted, free of charge, to any person obtaining a 4 * copy of this software and associated documentation files (the "Software"), 5 * to deal in the Software without restriction, including without limitation 6 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 7 * and/or sell copies of the Software, and to permit persons to whom the 8 * Software is furnished to do so, subject to the following conditions: 9 * 10 * The above copyright notice and this permission notice shall be included in 11 * all copies or substantial portions of the Software. 12 * 13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 15 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 16 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 17 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 18 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 19 * OTHER DEALINGS IN THE SOFTWARE. 20 * 21 * Authors: AMD 22 * 23 */ 24 25 #ifndef __DCN32_DPP_H__ 26 #define __DCN32_DPP_H__ 27 28 #include "dcn20/dcn20_dpp.h" 29 #include "dcn30/dcn30_dpp.h" 30 #include "spl/dc_spl_types.h" 31 32 bool dpp32_construct(struct dcn3_dpp *dpp3, 33 struct dc_context *ctx, 34 uint32_t inst, 35 const struct dcn3_dpp_registers *tf_regs, 36 const struct dcn3_dpp_shift *tf_shift, 37 const struct dcn3_dpp_mask *tf_mask); 38 39 void dscl32_spl_calc_lb_num_partitions( 40 bool alpha_en, 41 const struct spl_scaler_data *scl_data, 42 enum lb_memory_config lb_config, 43 int *num_part_y, 44 int *num_part_c); 45 46 #endif /* __DCN32_DPP_H__ */ 47