1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com>
4 * Copyright (C) 2020 Western Digital Corporation or its affiliates.
5 */
6#include <dt-bindings/clock/k210-clk.h>
7#include <dt-bindings/pinctrl/k210-fpioa.h>
8#include <dt-bindings/reset/k210-rst.h>
9
10/ {
11	/*
12	 * Although the K210 is a 64-bit CPU, the address bus is only 32-bits
13	 * wide, and the upper half of all addresses is ignored.
14	 */
15	#address-cells = <1>;
16	#size-cells = <1>;
17	compatible = "canaan,kendryte-k210";
18
19	/*
20	 * The K210 has an sv39 MMU following the privileged specification v1.9.
21	 * Since this is a non-ratified draft specification, the kernel does not
22	 * support it and the K210 support enabled only for the !MMU case.
23	 * Be consistent with this by setting the CPUs MMU type to "none".
24	 */
25	cpus {
26		#address-cells = <1>;
27		#size-cells = <0>;
28		timebase-frequency = <7800000>;
29		cpu0: cpu@0 {
30			device_type = "cpu";
31			compatible = "canaan,k210", "riscv";
32			reg = <0>;
33			riscv,isa = "rv64imafdc";
34			mmu-type = "riscv,none";
35			i-cache-block-size = <64>;
36			i-cache-size = <0x8000>;
37			d-cache-block-size = <64>;
38			d-cache-size = <0x8000>;
39			cpu0_intc: interrupt-controller {
40				#interrupt-cells = <1>;
41				interrupt-controller;
42				compatible = "riscv,cpu-intc";
43			};
44		};
45		cpu1: cpu@1 {
46			device_type = "cpu";
47			compatible = "canaan,k210", "riscv";
48			reg = <1>;
49			riscv,isa = "rv64imafdc";
50			mmu-type = "riscv,none";
51			i-cache-block-size = <64>;
52			i-cache-size = <0x8000>;
53			d-cache-block-size = <64>;
54			d-cache-size = <0x8000>;
55			cpu1_intc: interrupt-controller {
56				#interrupt-cells = <1>;
57				interrupt-controller;
58				compatible = "riscv,cpu-intc";
59			};
60		};
61
62		cpu-map {
63			cluster0 {
64				core0 {
65					cpu = <&cpu0>;
66				};
67
68				core1 {
69					cpu = <&cpu1>;
70				};
71			};
72		};
73	};
74
75	sram: memory@80000000 {
76		device_type = "memory";
77		reg = <0x80000000 0x400000>, /* sram0 4 MiB */
78		      <0x80400000 0x200000>, /* sram1 2 MiB */
79		      <0x80600000 0x200000>; /* aisram 2 MiB */
80	};
81
82	sram_controller: memory-controller {
83		compatible = "canaan,k210-sram";
84		clocks = <&sysclk K210_CLK_SRAM0>,
85			 <&sysclk K210_CLK_SRAM1>,
86			 <&sysclk K210_CLK_AI>;
87		clock-names = "sram0", "sram1", "aisram";
88	};
89
90	clocks {
91		in0: oscillator {
92			compatible = "fixed-clock";
93			#clock-cells = <0>;
94			clock-frequency = <26000000>;
95		};
96	};
97
98	soc {
99		#address-cells = <1>;
100		#size-cells = <1>;
101		compatible = "simple-bus";
102		ranges;
103		interrupt-parent = <&plic0>;
104
105		rom0: nvmem@1000 {
106			reg = <0x1000 0x1000>;
107			read-only;
108		};
109
110		clint0: timer@2000000 {
111			compatible = "canaan,k210-clint", "sifive,clint0";
112			reg = <0x2000000 0xC000>;
113			interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>,
114					      <&cpu1_intc 3>, <&cpu1_intc 7>;
115		};
116
117		plic0: interrupt-controller@c000000 {
118			#interrupt-cells = <1>;
119			#address-cells = <0>;
120			compatible = "canaan,k210-plic", "sifive,plic-1.0.0";
121			reg = <0xC000000 0x4000000>;
122			interrupt-controller;
123			interrupts-extended = <&cpu0_intc 11>, <&cpu0_intc 9>,
124					      <&cpu1_intc 11>, <&cpu1_intc 9>;
125			riscv,ndev = <65>;
126		};
127
128		uarths0: serial@38000000 {
129			compatible = "canaan,k210-uarths", "sifive,uart0";
130			reg = <0x38000000 0x1000>;
131			interrupts = <33>;
132			clocks = <&sysclk K210_CLK_CPU>;
133			status = "disabled";
134		};
135
136		gpio0: gpio-controller@38001000 {
137			#interrupt-cells = <2>;
138			#gpio-cells = <2>;
139			compatible = "canaan,k210-gpiohs", "sifive,gpio0";
140			reg = <0x38001000 0x1000>;
141			interrupt-controller;
142			interrupts = <34>, <35>, <36>, <37>, <38>, <39>, <40>,
143				     <41>, <42>, <43>, <44>, <45>, <46>, <47>,
144				     <48>, <49>, <50>, <51>, <52>, <53>, <54>,
145				     <55>, <56>, <57>, <58>, <59>, <60>, <61>,
146				     <62>, <63>, <64>, <65>;
147			gpio-controller;
148			ngpios = <32>;
149			status = "disabled";
150		};
151
152		dmac0: dma-controller@50000000 {
153			compatible = "snps,axi-dma-1.01a";
154			reg = <0x50000000 0x1000>;
155			interrupts = <27>, <28>, <29>, <30>, <31>, <32>;
156			#dma-cells = <1>;
157			clocks = <&sysclk K210_CLK_DMA>, <&sysclk K210_CLK_DMA>;
158			clock-names = "core-clk", "cfgr-clk";
159			resets = <&sysrst K210_RST_DMA>;
160			dma-channels = <6>;
161			snps,dma-masters = <2>;
162			snps,priority = <0 1 2 3 4 5>;
163			snps,data-width = <5>;
164			snps,block-size = <0x200000 0x200000 0x200000
165					   0x200000 0x200000 0x200000>;
166			snps,axi-max-burst-len = <256>;
167		};
168
169		apb0: bus@50200000 {
170			#address-cells = <1>;
171			#size-cells = <1>;
172			compatible = "simple-pm-bus";
173			ranges = <0x50200000 0x50200000 0x200000>;
174			clocks = <&sysclk K210_CLK_APB0>;
175
176			gpio1: gpio@50200000 {
177				#address-cells = <1>;
178				#size-cells = <0>;
179				compatible = "snps,dw-apb-gpio";
180				reg = <0x50200000 0x80>;
181				clocks = <&sysclk K210_CLK_APB0>,
182					 <&sysclk K210_CLK_GPIO>;
183				clock-names = "bus", "db";
184				resets = <&sysrst K210_RST_GPIO>;
185				status = "disabled";
186
187				gpio1_0: gpio-port@0 {
188					#gpio-cells = <2>;
189					#interrupt-cells = <2>;
190					compatible = "snps,dw-apb-gpio-port";
191					reg = <0>;
192					interrupt-controller;
193					interrupts = <23>;
194					gpio-controller;
195					ngpios = <8>;
196				};
197			};
198
199			uart1: serial@50210000 {
200				compatible = "snps,dw-apb-uart";
201				reg = <0x50210000 0x100>;
202				interrupts = <11>;
203				clocks = <&sysclk K210_CLK_UART1>,
204					 <&sysclk K210_CLK_APB0>;
205				clock-names = "baudclk", "apb_pclk";
206				resets = <&sysrst K210_RST_UART1>;
207				reg-io-width = <4>;
208				reg-shift = <2>;
209				dcd-override;
210				dsr-override;
211				cts-override;
212				ri-override;
213				status = "disabled";
214			};
215
216			uart2: serial@50220000 {
217				compatible = "snps,dw-apb-uart";
218				reg = <0x50220000 0x100>;
219				interrupts = <12>;
220				clocks = <&sysclk K210_CLK_UART2>,
221					 <&sysclk K210_CLK_APB0>;
222				clock-names = "baudclk", "apb_pclk";
223				resets = <&sysrst K210_RST_UART2>;
224				reg-io-width = <4>;
225				reg-shift = <2>;
226				dcd-override;
227				dsr-override;
228				cts-override;
229				ri-override;
230				status = "disabled";
231			};
232
233			uart3: serial@50230000 {
234				compatible = "snps,dw-apb-uart";
235				reg = <0x50230000 0x100>;
236				interrupts = <13>;
237				clocks = <&sysclk K210_CLK_UART3>,
238					 <&sysclk K210_CLK_APB0>;
239				clock-names = "baudclk", "apb_pclk";
240				resets = <&sysrst K210_RST_UART3>;
241				reg-io-width = <4>;
242				reg-shift = <2>;
243				dcd-override;
244				dsr-override;
245				cts-override;
246				ri-override;
247				status = "disabled";
248			};
249
250			spi2: spi@50240000 {
251				compatible = "canaan,k210-spi";
252				spi-slave;
253				reg = <0x50240000 0x100>;
254				#address-cells = <0>;
255				#size-cells = <0>;
256				interrupts = <3>;
257				clocks = <&sysclk K210_CLK_SPI2>,
258					 <&sysclk K210_CLK_APB0>;
259				clock-names = "ssi_clk", "pclk";
260				resets = <&sysrst K210_RST_SPI2>;
261				status = "disabled";
262			};
263
264			i2s0: i2s@50250000 {
265				compatible = "canaan,k210-i2s", "snps,designware-i2s";
266				reg = <0x50250000 0x200>;
267				interrupts = <5>;
268				clocks = <&sysclk K210_CLK_I2S0>;
269				clock-names = "i2sclk";
270				resets = <&sysrst K210_RST_I2S0>;
271				status = "disabled";
272			};
273
274			i2s1: i2s@50260000 {
275				compatible = "canaan,k210-i2s", "snps,designware-i2s";
276				reg = <0x50260000 0x200>;
277				interrupts = <6>;
278				clocks = <&sysclk K210_CLK_I2S1>;
279				clock-names = "i2sclk";
280				resets = <&sysrst K210_RST_I2S1>;
281				status = "disabled";
282			};
283
284			i2s2: i2s@50270000 {
285				compatible = "canaan,k210-i2s", "snps,designware-i2s";
286				reg = <0x50270000 0x200>;
287				interrupts = <7>;
288				clocks = <&sysclk K210_CLK_I2S2>;
289				clock-names = "i2sclk";
290				resets = <&sysrst K210_RST_I2S2>;
291				status = "disabled";
292			};
293
294			i2c0: i2c@50280000 {
295				compatible = "snps,designware-i2c";
296				reg = <0x50280000 0x100>;
297				interrupts = <8>;
298				clocks = <&sysclk K210_CLK_I2C0>,
299					 <&sysclk K210_CLK_APB0>;
300				clock-names = "ref", "pclk";
301				resets = <&sysrst K210_RST_I2C0>;
302				status = "disabled";
303			};
304
305			i2c1: i2c@50290000 {
306				compatible = "snps,designware-i2c";
307				reg = <0x50290000 0x100>;
308				interrupts = <9>;
309				clocks = <&sysclk K210_CLK_I2C1>,
310					 <&sysclk K210_CLK_APB0>;
311				clock-names = "ref", "pclk";
312				resets = <&sysrst K210_RST_I2C1>;
313				status = "disabled";
314			};
315
316			i2c2: i2c@502a0000 {
317				compatible = "snps,designware-i2c";
318				reg = <0x502A0000 0x100>;
319				interrupts = <10>;
320				clocks = <&sysclk K210_CLK_I2C2>,
321					 <&sysclk K210_CLK_APB0>;
322				clock-names = "ref", "pclk";
323				resets = <&sysrst K210_RST_I2C2>;
324				status = "disabled";
325			};
326
327			fpioa: pinmux@502b0000 {
328				compatible = "canaan,k210-fpioa";
329				reg = <0x502B0000 0x100>;
330				clocks = <&sysclk K210_CLK_FPIOA>,
331					 <&sysclk K210_CLK_APB0>;
332				clock-names = "ref", "pclk";
333				resets = <&sysrst K210_RST_FPIOA>;
334				canaan,k210-sysctl-power = <&sysctl 108>;
335			};
336
337			timer0: timer@502d0000 {
338				compatible = "snps,dw-apb-timer";
339				reg = <0x502D0000 0x14>;
340				interrupts = <14>;
341				clocks = <&sysclk K210_CLK_TIMER0>,
342					 <&sysclk K210_CLK_APB0>;
343				clock-names = "timer", "pclk";
344				resets = <&sysrst K210_RST_TIMER0>;
345			};
346
347			timer1: timer@502d0014 {
348				compatible = "snps,dw-apb-timer";
349				reg = <0x502D0014 0x14>;
350				interrupts = <15>;
351				clocks = <&sysclk K210_CLK_TIMER0>,
352					 <&sysclk K210_CLK_APB0>;
353				clock-names = "timer", "pclk";
354				resets = <&sysrst K210_RST_TIMER0>;
355			};
356
357			timer2: timer@502e0000 {
358				compatible = "snps,dw-apb-timer";
359				reg = <0x502E0000 0x14>;
360				interrupts = <16>;
361				clocks = <&sysclk K210_CLK_TIMER1>,
362					 <&sysclk K210_CLK_APB0>;
363				clock-names = "timer", "pclk";
364				resets = <&sysrst K210_RST_TIMER1>;
365			};
366
367			timer3: timer@502e0014 {
368				compatible = "snps,dw-apb-timer";
369				reg = <0x502E0014 0x114>;
370				interrupts = <17>;
371				clocks = <&sysclk K210_CLK_TIMER1>,
372					 <&sysclk K210_CLK_APB0>;
373				clock-names = "timer", "pclk";
374				resets = <&sysrst K210_RST_TIMER1>;
375			};
376
377			timer4: timer@502f0000 {
378				compatible = "snps,dw-apb-timer";
379				reg = <0x502F0000 0x14>;
380				interrupts = <18>;
381				clocks = <&sysclk K210_CLK_TIMER2>,
382					 <&sysclk K210_CLK_APB0>;
383				clock-names = "timer", "pclk";
384				resets = <&sysrst K210_RST_TIMER2>;
385			};
386
387			timer5: timer@502f0014 {
388				compatible = "snps,dw-apb-timer";
389				reg = <0x502F0014 0x14>;
390				interrupts = <19>;
391				clocks = <&sysclk K210_CLK_TIMER2>,
392					 <&sysclk K210_CLK_APB0>;
393				clock-names = "timer", "pclk";
394				resets = <&sysrst K210_RST_TIMER2>;
395			};
396		};
397
398		apb1: bus@50400000 {
399			#address-cells = <1>;
400			#size-cells = <1>;
401			compatible = "simple-pm-bus";
402			ranges = <0x50400000 0x50400000 0x40100>;
403			clocks = <&sysclk K210_CLK_APB1>;
404
405			wdt0: watchdog@50400000 {
406				compatible = "snps,dw-wdt";
407				reg = <0x50400000 0x100>;
408				interrupts = <21>;
409				clocks = <&sysclk K210_CLK_WDT0>,
410					 <&sysclk K210_CLK_APB1>;
411				clock-names = "tclk", "pclk";
412				resets = <&sysrst K210_RST_WDT0>;
413			};
414
415			wdt1: watchdog@50410000 {
416				compatible = "snps,dw-wdt";
417				reg = <0x50410000 0x100>;
418				interrupts = <22>;
419				clocks = <&sysclk K210_CLK_WDT1>,
420					 <&sysclk K210_CLK_APB1>;
421				clock-names = "tclk", "pclk";
422				resets = <&sysrst K210_RST_WDT1>;
423			};
424
425			sysctl: syscon@50440000 {
426				compatible = "canaan,k210-sysctl",
427					     "syscon", "simple-mfd";
428				reg = <0x50440000 0x100>;
429				clocks = <&sysclk K210_CLK_APB1>;
430				clock-names = "pclk";
431
432				sysclk: clock-controller {
433					#clock-cells = <1>;
434					compatible = "canaan,k210-clk";
435					clocks = <&in0>;
436				};
437
438				sysrst: reset-controller {
439					compatible = "canaan,k210-rst";
440					#reset-cells = <1>;
441				};
442
443				reboot: syscon-reboot {
444					compatible = "syscon-reboot";
445					regmap = <&sysctl>;
446					offset = <48>;
447					mask = <1>;
448					value = <1>;
449				};
450			};
451		};
452
453		apb2: bus@52000000 {
454			#address-cells = <1>;
455			#size-cells = <1>;
456			compatible = "simple-pm-bus";
457			ranges = <0x52000000 0x52000000 0x2000200>;
458			clocks = <&sysclk K210_CLK_APB2>;
459
460			spi0: spi@52000000 {
461				#address-cells = <1>;
462				#size-cells = <0>;
463				compatible = "canaan,k210-spi";
464				reg = <0x52000000 0x100>;
465				interrupts = <1>;
466				clocks = <&sysclk K210_CLK_SPI0>,
467					 <&sysclk K210_CLK_APB2>;
468				clock-names = "ssi_clk", "pclk";
469				resets = <&sysrst K210_RST_SPI0>;
470				reset-names = "spi";
471				num-cs = <4>;
472				reg-io-width = <4>;
473				status = "disabled";
474			};
475
476			spi1: spi@53000000 {
477				#address-cells = <1>;
478				#size-cells = <0>;
479				compatible = "canaan,k210-spi";
480				reg = <0x53000000 0x100>;
481				interrupts = <2>;
482				clocks = <&sysclk K210_CLK_SPI1>,
483					 <&sysclk K210_CLK_APB2>;
484				clock-names = "ssi_clk", "pclk";
485				resets = <&sysrst K210_RST_SPI1>;
486				reset-names = "spi";
487				num-cs = <4>;
488				reg-io-width = <4>;
489				status = "disabled";
490			};
491
492			spi3: spi@54000000 {
493				#address-cells = <1>;
494				#size-cells = <0>;
495				compatible = "snps,dwc-ssi-1.01a";
496				reg = <0x54000000 0x200>;
497				interrupts = <4>;
498				clocks = <&sysclk K210_CLK_SPI3>,
499					 <&sysclk K210_CLK_APB2>;
500				clock-names = "ssi_clk", "pclk";
501				resets = <&sysrst K210_RST_SPI3>;
502				reset-names = "spi";
503
504				num-cs = <4>;
505				reg-io-width = <4>;
506				status = "disabled";
507			};
508		};
509	};
510};
511