1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2
3/dts-v1/;
4
5#include "imx8mp-skov-reva.dtsi"
6
7/ {
8	model = "SKOV IMX8MP CPU revB - MI1010AIT-1CP1";
9	compatible = "skov,imx8mp-skov-revb-mi1010ait-1cp1", "fsl,imx8mp";
10
11	panel {
12		compatible = "multi-inno,mi1010ait-1cp";
13		backlight = <&backlight>;
14		power-supply = <&reg_tft_vcom>;
15
16		port {
17			in_lvds0: endpoint {
18				remote-endpoint = <&ldb_lvds_ch0>;
19			};
20		};
21	};
22};
23
24&backlight {
25	status = "okay";
26};
27
28&i2c2 {
29	clock-frequency = <100000>;
30	pinctrl-names = "default";
31	pinctrl-0 = <&pinctrl_i2c2>;
32	status = "okay";
33
34	touchscreen@38 {
35		compatible = "edt,edt-ft5406";
36		reg = <0x38>;
37		pinctrl-names = "default";
38		pinctrl-0 = <&pinctrl_touchscreen>;
39		interrupts-extended = <&gpio4 28 IRQ_TYPE_EDGE_FALLING>;
40		reset-gpios = <&gpio4 29 GPIO_ACTIVE_LOW>;
41		touchscreen-size-x = <1280>;
42		touchscreen-size-y = <800>;
43		vcc-supply = <&reg_vdd_3v3>;
44		iovcc-supply = <&reg_vdd_3v3>;
45		wakeup-source;
46	};
47};
48
49&lcdif2 {
50	status = "okay";
51};
52
53&lvds_bridge {
54	/* IMX8MP_CLK_MEDIA_LDB = IMX8MP_CLK_MEDIA_DISP2_PIX * 7 */
55	assigned-clock-rates = <482300000>;
56	status = "okay";
57
58	ports {
59		port@1 {
60			ldb_lvds_ch0: endpoint {
61				remote-endpoint = <&in_lvds0>;
62			};
63		};
64	};
65};
66
67&media_blk_ctrl {
68	/* currently it is not possible to let display clocks confugure
69	 * automatically, so we need to set them manually
70	 */
71	assigned-clock-rates = <500000000>, <200000000>, <0>,
72		/* IMX8MP_CLK_MEDIA_DISP2_PIX = pixelclk of lvds panel */
73		<68900000>,
74		<500000000>,
75		/* IMX8MP_VIDEO_PLL1 = IMX8MP_CLK_MEDIA_LDB * 2 */
76		<964600000>;
77};
78
79&pwm4 {
80	status = "okay";
81};
82
83&pwm1 {
84	status = "okay";
85};
86
87&reg_tft_vcom {
88	regulator-min-microvolt = <3160000>;
89	regulator-max-microvolt = <3160000>;
90	voltage-table = <3160000 73>;
91	status = "okay";
92};
93
94&iomuxc {
95	pinctrl_i2c2: i2c2grp {
96		fsl,pins = <
97			MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL				0x400001c2
98			MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA				0x400001c2
99		>;
100	};
101};
102