1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (C) 1995-2003 Russell King
4 * 2001-2002 Keith Owens
5 *
6 * Generate definitions needed by assembly language modules.
7 * This code generates raw asm output which is post-processed to extract
8 * and format the required data.
9 */
10 #include <linux/compiler.h>
11 #include <linux/sched.h>
12 #include <linux/mm.h>
13 #include <linux/dma-mapping.h>
14 #include <asm/cacheflush.h>
15 #include <asm/kexec-internal.h>
16 #include <asm/glue-df.h>
17 #include <asm/glue-pf.h>
18 #include <asm/mach/arch.h>
19 #include <asm/thread_info.h>
20 #include <asm/page.h>
21 #include <asm/mpu.h>
22 #include <asm/procinfo.h>
23 #include <asm/suspend.h>
24 #include <asm/hardware/cache-l2x0.h>
25 #include <linux/kbuild.h>
26 #include <linux/arm-smccc.h>
27
28 #include <vdso/datapage.h>
29
30 #include "signal.h"
31
32 /*
33 * Make sure that the compiler and target are compatible.
34 */
35 #if defined(__APCS_26__)
36 #error Sorry, your compiler targets APCS-26 but this kernel requires APCS-32
37 #endif
38
main(void)39 int main(void)
40 {
41 DEFINE(TSK_ACTIVE_MM, offsetof(struct task_struct, active_mm));
42 #ifdef CONFIG_STACKPROTECTOR
43 DEFINE(TSK_STACK_CANARY, offsetof(struct task_struct, stack_canary));
44 #endif
45 BLANK();
46 DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
47 DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count));
48 DEFINE(TI_CPU, offsetof(struct thread_info, cpu));
49 DEFINE(TI_CPU_DOMAIN, offsetof(struct thread_info, cpu_domain));
50 DEFINE(TI_CPU_SAVE, offsetof(struct thread_info, cpu_context));
51 DEFINE(TI_ABI_SYSCALL, offsetof(struct thread_info, abi_syscall));
52 DEFINE(TI_TP_VALUE, offsetof(struct thread_info, tp_value));
53 DEFINE(TI_FPSTATE, offsetof(struct thread_info, fpstate));
54 #ifdef CONFIG_VFP
55 DEFINE(TI_VFPSTATE, offsetof(struct thread_info, vfpstate));
56 #ifdef CONFIG_SMP
57 DEFINE(VFP_CPU, offsetof(union vfp_state, hard.cpu));
58 #endif
59 #endif
60 DEFINE(SOFTIRQ_DISABLE_OFFSET,SOFTIRQ_DISABLE_OFFSET);
61 #ifdef CONFIG_ARM_THUMBEE
62 DEFINE(TI_THUMBEE_STATE, offsetof(struct thread_info, thumbee_state));
63 #endif
64 #ifdef CONFIG_IWMMXT
65 DEFINE(TI_IWMMXT_STATE, offsetof(struct thread_info, fpstate.iwmmxt));
66 #endif
67 BLANK();
68 DEFINE(S_R0, offsetof(struct pt_regs, ARM_r0));
69 DEFINE(S_R1, offsetof(struct pt_regs, ARM_r1));
70 DEFINE(S_R2, offsetof(struct pt_regs, ARM_r2));
71 DEFINE(S_R3, offsetof(struct pt_regs, ARM_r3));
72 DEFINE(S_R4, offsetof(struct pt_regs, ARM_r4));
73 DEFINE(S_R5, offsetof(struct pt_regs, ARM_r5));
74 DEFINE(S_R6, offsetof(struct pt_regs, ARM_r6));
75 DEFINE(S_R7, offsetof(struct pt_regs, ARM_r7));
76 DEFINE(S_R8, offsetof(struct pt_regs, ARM_r8));
77 DEFINE(S_R9, offsetof(struct pt_regs, ARM_r9));
78 DEFINE(S_R10, offsetof(struct pt_regs, ARM_r10));
79 DEFINE(S_FP, offsetof(struct pt_regs, ARM_fp));
80 DEFINE(S_IP, offsetof(struct pt_regs, ARM_ip));
81 DEFINE(S_SP, offsetof(struct pt_regs, ARM_sp));
82 DEFINE(S_LR, offsetof(struct pt_regs, ARM_lr));
83 DEFINE(S_PC, offsetof(struct pt_regs, ARM_pc));
84 DEFINE(S_PSR, offsetof(struct pt_regs, ARM_cpsr));
85 DEFINE(S_OLD_R0, offsetof(struct pt_regs, ARM_ORIG_r0));
86 DEFINE(PT_REGS_SIZE, sizeof(struct pt_regs));
87 DEFINE(SVC_DACR, offsetof(struct svc_pt_regs, dacr));
88 DEFINE(SVC_TTBCR, offsetof(struct svc_pt_regs, ttbcr));
89 DEFINE(SVC_REGS_SIZE, sizeof(struct svc_pt_regs));
90 BLANK();
91 DEFINE(SIGFRAME_RC3_OFFSET, offsetof(struct sigframe, retcode[3]));
92 DEFINE(RT_SIGFRAME_RC3_OFFSET, offsetof(struct rt_sigframe, sig.retcode[3]));
93 BLANK();
94 #ifdef CONFIG_CACHE_L2X0
95 DEFINE(L2X0_R_PHY_BASE, offsetof(struct l2x0_regs, phy_base));
96 DEFINE(L2X0_R_AUX_CTRL, offsetof(struct l2x0_regs, aux_ctrl));
97 DEFINE(L2X0_R_TAG_LATENCY, offsetof(struct l2x0_regs, tag_latency));
98 DEFINE(L2X0_R_DATA_LATENCY, offsetof(struct l2x0_regs, data_latency));
99 DEFINE(L2X0_R_FILTER_START, offsetof(struct l2x0_regs, filter_start));
100 DEFINE(L2X0_R_FILTER_END, offsetof(struct l2x0_regs, filter_end));
101 DEFINE(L2X0_R_PREFETCH_CTRL, offsetof(struct l2x0_regs, prefetch_ctrl));
102 DEFINE(L2X0_R_PWR_CTRL, offsetof(struct l2x0_regs, pwr_ctrl));
103 BLANK();
104 #endif
105 #ifdef CONFIG_CPU_HAS_ASID
106 DEFINE(MM_CONTEXT_ID, offsetof(struct mm_struct, context.id.counter));
107 BLANK();
108 #endif
109 DEFINE(VMA_VM_MM, offsetof(struct vm_area_struct, vm_mm));
110 DEFINE(VMA_VM_FLAGS, offsetof(struct vm_area_struct, vm_flags));
111 BLANK();
112 DEFINE(VM_EXEC, VM_EXEC);
113 BLANK();
114 DEFINE(PAGE_SZ, PAGE_SIZE);
115 BLANK();
116 DEFINE(SYS_ERROR0, 0x9f0000);
117 BLANK();
118 DEFINE(SIZEOF_MACHINE_DESC, sizeof(struct machine_desc));
119 DEFINE(MACHINFO_TYPE, offsetof(struct machine_desc, nr));
120 DEFINE(MACHINFO_NAME, offsetof(struct machine_desc, name));
121 BLANK();
122 DEFINE(PROC_INFO_SZ, sizeof(struct proc_info_list));
123 DEFINE(PROCINFO_INITFUNC, offsetof(struct proc_info_list, __cpu_flush));
124 DEFINE(PROCINFO_MM_MMUFLAGS, offsetof(struct proc_info_list, __cpu_mm_mmu_flags));
125 DEFINE(PROCINFO_IO_MMUFLAGS, offsetof(struct proc_info_list, __cpu_io_mmu_flags));
126 BLANK();
127 #ifdef MULTI_DABORT
128 DEFINE(PROCESSOR_DABT_FUNC, offsetof(struct processor, _data_abort));
129 #endif
130 #ifdef MULTI_PABORT
131 DEFINE(PROCESSOR_PABT_FUNC, offsetof(struct processor, _prefetch_abort));
132 #endif
133 #ifdef MULTI_CPU
134 DEFINE(CPU_SLEEP_SIZE, offsetof(struct processor, suspend_size));
135 DEFINE(CPU_DO_SUSPEND, offsetof(struct processor, do_suspend));
136 DEFINE(CPU_DO_RESUME, offsetof(struct processor, do_resume));
137 #endif
138 #ifdef MULTI_CACHE
139 DEFINE(CACHE_FLUSH_KERN_ALL, offsetof(struct cpu_cache_fns, flush_kern_all));
140 #endif
141 #ifdef CONFIG_ARM_CPU_SUSPEND
142 DEFINE(SLEEP_SAVE_SP_SZ, sizeof(struct sleep_save_sp));
143 DEFINE(SLEEP_SAVE_SP_PHYS, offsetof(struct sleep_save_sp, save_ptr_stash_phys));
144 DEFINE(SLEEP_SAVE_SP_VIRT, offsetof(struct sleep_save_sp, save_ptr_stash));
145 #endif
146 DEFINE(ARM_SMCCC_QUIRK_ID_OFFS, offsetof(struct arm_smccc_quirk, id));
147 DEFINE(ARM_SMCCC_QUIRK_STATE_OFFS, offsetof(struct arm_smccc_quirk, state));
148 BLANK();
149 DEFINE(DMA_BIDIRECTIONAL, DMA_BIDIRECTIONAL);
150 DEFINE(DMA_TO_DEVICE, DMA_TO_DEVICE);
151 DEFINE(DMA_FROM_DEVICE, DMA_FROM_DEVICE);
152 BLANK();
153 DEFINE(CACHE_WRITEBACK_ORDER, __CACHE_WRITEBACK_ORDER);
154 DEFINE(CACHE_WRITEBACK_GRANULE, __CACHE_WRITEBACK_GRANULE);
155 BLANK();
156 #ifdef CONFIG_VDSO
157 DEFINE(VDSO_DATA_SIZE, sizeof(union vdso_data_store));
158 #endif
159 BLANK();
160 #ifdef CONFIG_ARM_MPU
161 DEFINE(MPU_RNG_INFO_RNGS, offsetof(struct mpu_rgn_info, rgns));
162 DEFINE(MPU_RNG_INFO_USED, offsetof(struct mpu_rgn_info, used));
163
164 DEFINE(MPU_RNG_SIZE, sizeof(struct mpu_rgn));
165 DEFINE(MPU_RGN_DRBAR, offsetof(struct mpu_rgn, drbar));
166 DEFINE(MPU_RGN_DRSR, offsetof(struct mpu_rgn, drsr));
167 DEFINE(MPU_RGN_DRACR, offsetof(struct mpu_rgn, dracr));
168 DEFINE(MPU_RGN_PRBAR, offsetof(struct mpu_rgn, prbar));
169 DEFINE(MPU_RGN_PRLAR, offsetof(struct mpu_rgn, prlar));
170 #endif
171 DEFINE(KEXEC_START_ADDR, offsetof(struct kexec_relocate_data, kexec_start_address));
172 DEFINE(KEXEC_INDIR_PAGE, offsetof(struct kexec_relocate_data, kexec_indirection_page));
173 DEFINE(KEXEC_MACH_TYPE, offsetof(struct kexec_relocate_data, kexec_mach_type));
174 DEFINE(KEXEC_R2, offsetof(struct kexec_relocate_data, kexec_r2));
175 return 0;
176 }
177