1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
4 * Copyright (C) 2018 Robert Bosch Power Tools GmbH
5 */
6/dts-v1/;
7
8#include "am33xx.dtsi"
9#include <dt-bindings/input/input.h>
10#include <dt-bindings/interrupt-controller/irq.h>
11
12/ {
13	model = "Bosch AM335x Guardian";
14	compatible = "bosch,am335x-guardian", "ti,am33xx";
15
16	chosen {
17		stdout-path = &uart0;
18		tick-timer = &timer2;
19	};
20
21	cpus {
22		cpu@0 {
23			cpu0-supply = <&dcdc2_reg>;
24		};
25	};
26
27	memory@80000000 {
28		device_type = "memory";
29		reg = <0x80000000 0x10000000>; /* 256 MB */
30	};
31
32	guardian_buttons: gpio-keys {
33		pinctrl-names = "default";
34		pinctrl-0 = <&guardian_button_pins>;
35		compatible = "gpio-keys";
36
37		select-button {
38			label = "guardian-select-button";
39			linux,code = <KEY_5>;
40			gpios = <&gpio1 31 GPIO_ACTIVE_LOW>;
41			wakeup-source;
42		};
43
44		power-button {
45			label = "guardian-power-button";
46			linux,code = <KEY_POWER>;
47			gpios = <&gpio2 21 GPIO_ACTIVE_LOW>;
48			wakeup-source;
49		};
50	};
51
52	guardian_leds: gpio-leds {
53		pinctrl-names = "default";
54		pinctrl-0 = <&guardian_led_pins>;
55		compatible = "gpio-leds";
56
57		life-led {
58			label = "guardian:life-led";
59			gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
60			linux,default-trigger = "heartbeat";
61			default-state = "off";
62		};
63	};
64
65	gpio-poweroff {
66		compatible = "gpio-poweroff";
67		gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
68	};
69
70	panel {
71		compatible = "ti,tilcdc,panel";
72		pinctrl-names = "default", "sleep";
73		pinctrl-0 = <&lcd_pins_default &lcd_disen_pins>;
74		pinctrl-1 = <&lcd_pins_sleep>;
75
76		display-timings {
77			timing-320x240 {
78				hactive         = <320>;
79				vactive         = <240>;
80				hback-porch     = <68>;
81				hfront-porch    = <20>;
82				hsync-len       = <1>;
83				vback-porch     = <18>;
84				vfront-porch    = <4>;
85				vsync-len       = <1>;
86				clock-frequency = <9000000>;
87				hsync-active    = <0>;
88				vsync-active    = <0>;
89			};
90		};
91		panel-info {
92			ac-bias           = <255>;
93			ac-bias-intrpt    = <0>;
94			dma-burst-sz      = <16>;
95			bpp               = <24>;
96			bus-width         = <16>;
97			fdd               = <0x80>;
98			sync-edge         = <0>;
99			sync-ctrl         = <1>;
100			raster-order      = <0>;
101			fifo-th           = <0>;
102		};
103
104	};
105
106	guardian_beeper: pwm-7 {
107		compatible = "ti,omap-dmtimer-pwm";
108		#pwm-cells = <3>;
109		ti,timers = <&timer7>;
110		pinctrl-names = "default";
111		pinctrl-0 = <&guardian_beeper_pins>;
112		ti,clock-source = <0x01>;
113	};
114
115	vmmcsd_fixed: fixedregulator0 {
116		compatible = "regulator-fixed";
117		regulator-name = "vmmcsd_fixed";
118		regulator-min-microvolt = <3300000>;
119		regulator-max-microvolt = <3300000>;
120	};
121
122	mt_keypad: mt_keypad@0 {
123		compatible = "gpio-mt-keypad";
124		debounce-delay-ms = <10>;
125		col-scan-delay-us = <2>;
126		keypad,num-lines = <5>;
127		linux,no-autorepeat;
128		gpio-activelow;
129		line-gpios = <
130			&gpio1 24 GPIO_ACTIVE_LOW    /*gpio_56*/
131			&gpio1 23 GPIO_ACTIVE_LOW    /*gpio_55*/
132			&gpio1 22 GPIO_ACTIVE_LOW    /*gpio_54*/
133			&gpio1 20 GPIO_ACTIVE_LOW    /*gpio_52*/
134			&gpio1 16 GPIO_ACTIVE_LOW    /*gpio_48*/
135		>;
136	};
137};
138
139&elm {
140	status = "okay";
141};
142
143&gpmc {
144	pinctrl-names = "default";
145	pinctrl-0 = <&nandflash_pins>;
146	ranges = <0 0 0x08000000 0x1000000>;  /* CS0: 16MB for NAND */
147	status = "okay";
148
149	nand@0,0 {
150		compatible = "ti,omap2-nand";
151		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
152		interrupt-parent = <&gpmc>;
153		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
154			     <1 IRQ_TYPE_NONE>; /* termcount */
155		rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
156		ti,nand-xfer-type = "prefetch-dma";
157		ti,nand-ecc-opt = "bch16";
158		ti,elm-id = <&elm>;
159		nand-bus-width = <8>;
160		gpmc,device-width = <1>;
161		gpmc,sync-clk-ps = <0>;
162		gpmc,cs-on-ns = <0>;
163		gpmc,cs-rd-off-ns = <30>;
164		gpmc,cs-wr-off-ns = <30>;
165		gpmc,adv-on-ns = <0>;
166		gpmc,adv-rd-off-ns = <30>;
167		gpmc,adv-wr-off-ns = <30>;
168		gpmc,we-on-ns = <0>;
169		gpmc,we-off-ns = <15>;
170		gpmc,oe-on-ns = <1>;
171		gpmc,oe-off-ns = <15>;
172		gpmc,access-ns = <30>;
173		gpmc,rd-cycle-ns = <30>;
174		gpmc,wr-cycle-ns = <30>;
175		gpmc,bus-turnaround-ns = <0>;
176		gpmc,cycle2cycle-delay-ns = <0>;
177		gpmc,clk-activation-ns = <0>;
178		gpmc,wr-access-ns = <0>;
179		gpmc,wr-data-mux-bus-ns = <0>;
180
181		/*
182		 * MTD partition table
183		 *
184		 * All SPL-* partitions are sized to minimal length which can
185		 * be independently programmable. For NAND flash this is equal
186		 * to size of erase-block.
187		 */
188		#address-cells = <1>;
189		#size-cells = <1>;
190
191		partition@0 {
192			label = "SPL";
193			reg = <0x0 0x40000>;
194		};
195
196		partition@1 {
197			label = "SPL.backup1";
198			reg = <0x40000  0x40000>;
199		};
200
201		partition@2 {
202			label = "SPL.backup2";
203			reg = <0x80000  0x40000>;
204		};
205
206		partition@3 {
207			label = "SPL.backup3";
208			reg = <0xc0000  0x40000>;
209		};
210
211		partition@4 {
212			label = "u-boot";
213			reg = <0x100000 0x100000>;
214		};
215
216		partition@5 {
217			label = "u-boot.backup1";
218			reg = <0x200000 0x100000>;
219		};
220
221		partition@6 {
222			label = "u-boot-2";
223			reg = <0x300000 0x100000>;
224		};
225
226		partition@7 {
227			label = "u-boot-2.backup1";
228			reg = <0x400000 0x100000>;
229		};
230
231		partition@8 {
232			label = "u-boot-env";
233			reg = <0x500000 0x40000>;
234		};
235
236		partition@9 {
237			label = "u-boot-env.backup1";
238			reg = <0x540000 0x40000>;
239		};
240
241		partition@10 {
242			label = "splash-screen";
243			reg = <0x580000 0x40000>;
244		};
245
246		partition@11 {
247			label = "UBI";
248			reg = <0x5c0000 0x1fa40000>;
249		};
250	};
251};
252
253&i2c0 {
254	pinctrl-names = "default";
255	pinctrl-0 = <&i2c0_pins>;
256	clock-frequency = <400000>;
257	status = "okay";
258
259	tps: tps@24 {
260		reg = <0x24>;
261	};
262};
263
264&lcdc {
265	blue-and-red-wiring = "crossed";
266	status = "okay";
267	port {
268		lcdc_0: endpoint@0 {
269			remote-endpoint = <0>;
270		};
271	};
272};
273
274&mmc1 {
275	bus-width = <0x4>;
276	pinctrl-names = "default";
277	pinctrl-0 = <&mmc1_pins>;
278	cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
279	vmmc-supply = <&vmmcsd_fixed>;
280	status = "okay";
281};
282
283&rtc {
284	clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
285	clock-names = "ext-clk", "int-clk";
286};
287
288&spi0 {
289	ti,pindir-d0-out-d1-in;
290	pinctrl-names = "default";
291	pinctrl-0 = <&spi0_pins>;
292	status = "okay";
293};
294
295#include "../../tps65217.dtsi"
296
297&tps {
298  /*
299   * Configure pmic to enter OFF-state instead of SLEEP-state ("RTC-only
300   * mode") at poweroff.  Most BeagleBone versions do not support RTC-only
301   * mode and risk hardware damage if this mode is entered.
302   *
303   * For details, see linux-omap mailing list May 2015 thread
304   *  [PATCH] ARM: dts: am335x-bone* enable pmic-shutdown-controller
305   * In particular, messages:
306   *  https://www.spinics.net/lists/linux-omap/msg118585.html
307   *  https://www.spinics.net/lists/linux-omap/msg118615.html
308   *
309   * You can override this later with
310   *  &tps {  /delete-property/ ti,pmic-shutdown-controller;  }
311   * if you want to use RTC-only mode and made sure you are not affected
312   * by the hardware problems. (Tip: double-check by performing a current
313   * measurement after shutdown: it should be less than 1 mA.)
314   */
315	ti,pmic-shutdown-controller;
316	interrupt-parent = <&intc>;
317	interrupts = <7>; /* NMI */
318
319	backlight {
320		isel = <1>;  /* 1 - ISET1, 2 ISET2 */
321		fdim = <500>; /* TPS65217_BL_FDIM_500HZ */
322		default-brightness = <50>;
323		/* 1(on) - enable current sink, while initialization */
324		/* 0(off) - disable current sink, while initialization */
325		isink-en = <1>;
326	};
327
328	regulators {
329		dcdc1_reg: regulator@0 {
330			regulator-name = "vdds_dpr";
331			regulator-always-on;
332		};
333
334		dcdc2_reg: regulator@1 {
335			/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
336			regulator-name = "vdd_mpu";
337			regulator-min-microvolt = <925000>;
338			regulator-max-microvolt = <1351500>;
339			regulator-boot-on;
340			regulator-always-on;
341		};
342
343		dcdc3_reg: regulator@2 {
344			/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
345			regulator-name = "vdd_core";
346			regulator-min-microvolt = <925000>;
347			regulator-max-microvolt = <1150000>;
348			regulator-boot-on;
349			regulator-always-on;
350		};
351
352		ldo1_reg: regulator@3 {
353			regulator-name = "vio,vrtc,vdds";
354			regulator-always-on;
355		};
356
357		ldo2_reg: regulator@4 {
358			regulator-name = "vdd_3v3aux";
359			regulator-always-on;
360		};
361
362		ldo3_reg: regulator@5 {
363			regulator-name = "vdd_1v8";
364			regulator-min-microvolt = <1800000>;
365			regulator-max-microvolt = <1800000>;
366			regulator-always-on;
367		};
368
369		ldo4_reg: regulator@6 {
370			regulator-name = "vdd_3v3a";
371			regulator-always-on;
372		};
373	};
374};
375
376&tscadc {
377	status = "okay";
378
379	adc {
380		ti,adc-channels = <0 1 2 3 4 5 6>;
381	};
382};
383
384&gpio0 {
385	gpio-line-names =
386		"",
387		"",
388		"",
389		"",
390		"",
391		"",
392		"",
393		"",
394		"",
395		"",
396		"",
397		"",
398		"",
399		"",
400		"",
401		"",
402		"",
403		"",
404		"",
405		"",
406		"",
407		"",
408		"",
409		"",
410		"",
411		"",
412		"",
413		"",
414		"",
415		"MirxWakeup",
416		"",
417		"";
418};
419
420&gpio3 {
421	ti,gpio-always-on;
422	ti,no-reset-on-init;
423	gpio-line-names =
424		"",
425		"MirxBtReset",
426		"",
427		"CcVolAdcEn",
428		"MirxBlePause",
429		"",
430		"",
431		"",
432		"",
433		"",
434		"",
435		"",
436		"",
437		"",
438		"AspEn",
439		"",
440		"",
441		"",
442		"",
443		"",
444		"",
445		"BatVolAdcEn",
446		"",
447		"",
448		"",
449		"",
450		"",
451		"",
452		"",
453		"",
454		"",
455		"";
456};
457
458&uart0 {
459	pinctrl-names = "default";
460	pinctrl-0 = <&uart0_pins>;
461	status = "okay";
462};
463
464&uart2 {
465	pinctrl-names = "default";
466	pinctrl-0 = <&uart2_pins>;
467	status = "okay";
468};
469
470&usb0 {
471	dr_mode = "peripheral";
472};
473
474&usb1 {
475	dr_mode = "host";
476	/delete-property/dmas;
477	/delete-property/dma-names;
478};
479
480&am33xx_pinmux {
481	pinctrl-names = "default";
482	pinctrl-0 = <&clkout2_pin &guardian_interface_pins>;
483
484	clkout2_pin: clkout2-pins {
485		pinctrl-single,pins = <
486			/* xdma_event_intr1.clkout2 */
487			AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3)
488		>;
489	};
490
491	guardian_interface_pins: interface-pins {
492		pinctrl-single,pins = <
493			/* ADC_BATSENSE_EN */
494			/* (A14) MCASP0_AHCLKx.gpio3[21] */
495			AM33XX_IOPAD(0x9ac, PIN_OUTPUT_PULLDOWN | MUX_MODE7 )
496			/* ADC_COINCELL_EN */
497			/* (J16) MII1_TX_EN.gpio3[3] */
498			AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE7 )
499			/* ASP_ENABLE */
500			/* (A13) MCASP0_ACLKx.gpio3[14] */
501			AM33XX_IOPAD(0x990, PIN_OUTPUT_PULLUP | MUX_MODE7)
502			/* (D16) uart1_rxd.uart1_rxd */
503			AM33XX_IOPAD(0x980, PIN_INPUT | MUX_MODE7)
504			/* (D15) uart1_txd.uart1_txd */
505			AM33XX_IOPAD(0x984, PIN_INPUT | MUX_MODE7)
506			/*SWITCH-OFF_3V6*/
507			/* (M18) gpio0[1] */
508			AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE7)
509			/* MIRACULIX */
510			/* (H17) gmii1_crs.gpio3[1] */
511			AM33XX_IOPAD(0x90c, PIN_OUTPUT_PULLDOWN | MUX_MODE7 )
512			/* (H18) rmii1_refclk.gpio0[29] */
513			AM33XX_IOPAD(0x944, PIN_OUTPUT_PULLDOWN | MUX_MODE7 )
514			/* (J18) gmii1_txd3.gpio0[16] */
515			AM33XX_IOPAD(0x91c, PIN_INPUT           | MUX_MODE7 )
516			/* (J17) gmii1_rxdv.gpio3[4] */
517			AM33XX_IOPAD(0x918, PIN_OUTPUT_PULLDOWN | MUX_MODE7 )
518		>;
519	};
520
521	guardian_beeper_pins: dmtimer7-pins {
522		pinctrl-single,pins = <
523			AM33XX_IOPAD(0x968, PIN_OUTPUT | MUX_MODE5) /* (E18) timer7 */
524		>;
525	};
526
527	guardian_button_pins: guardian-button-pins {
528		pinctrl-single,pins = <
529			AM33XX_IOPAD(0x940, PIN_INPUT | MUX_MODE7) /* (M16) gmii1_rxd0.gpio2[21] */
530			AM33XX_IOPAD(0x884, PIN_INPUT | MUX_MODE7) /* (V9)  gpmc_csn2.gpio1[31] */
531		>;
532	};
533
534
535	i2c0_pins: i2c0-pins {
536		pinctrl-single,pins = <
537			AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
538			AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
539		>;
540	};
541
542	led_bl_pins: gpio-led-bl-pins {
543		pinctrl-single,pins = <
544			/* P9_14, gpmc_a[2].GPIO1[18] (backlight control) */
545			AM33XX_IOPAD(0x848, PIN_OUTPUT | MUX_MODE7)
546		>;
547	};
548
549	lcd_disen_pins: lcd-disen-pins {
550		pinctrl-single,pins = <
551			/* P9_27, mcasp0_fsr.gpio3[19] (lcd_disen) */
552			AM33XX_IOPAD(0x9a4, PIN_OUTPUT_PULLUP | SLEWCTRL_SLOW | MUX_MODE7)
553		>;
554	};
555
556	lcd_pins_default: lcd-default-pins {
557		pinctrl-single,pins = <
558			/* (U10) gpmc_ad8.lcd_data23 */
559			AM33XX_IOPAD(0x820, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
560			/* (T10) gpmc_ad9.lcd_data22 */
561			AM33XX_IOPAD(0x824, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
562			/* (T11) gpmc_ad10.lcd_data21 */
563			AM33XX_IOPAD(0x828, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
564			/* (U12) gpmc_ad11.lcd_data20 */
565			AM33XX_IOPAD(0x82c, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
566			/* (T12) gpmc_ad12.lcd_data19 */
567			AM33XX_IOPAD(0x830, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
568			/* (R12) gpmc_ad13.lcd_data18 */
569			AM33XX_IOPAD(0x834, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
570			/* (V13) gpmc_ad14.lcd_data17 */
571			AM33XX_IOPAD(0x838, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
572			/* (U13) gpmc_ad15.lcd_data16 */
573			AM33XX_IOPAD(0x83c, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
574			/* lcd_data0.lcd_data0 */
575			AM33XX_IOPAD(0x8a0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
576			/* lcd_data1.lcd_data1 */
577			AM33XX_IOPAD(0x8a4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
578			/* lcd_data2.lcd_data2 */
579			AM33XX_IOPAD(0x8a8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
580			/* lcd_data3.lcd_data3 */
581			AM33XX_IOPAD(0x8ac, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
582			/* lcd_data4.lcd_data4 */
583			AM33XX_IOPAD(0x8b0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
584			/* lcd_data5.lcd_data5 */
585			AM33XX_IOPAD(0x8b4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
586			/* lcd_data6.lcd_data6 */
587			AM33XX_IOPAD(0x8b8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
588			/* lcd_data7.lcd_data7 */
589			AM33XX_IOPAD(0x8bc, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
590			/* lcd_data8.lcd_data8 */
591			AM33XX_IOPAD(0x8c0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
592			/* lcd_data9.lcd_data9 */
593			AM33XX_IOPAD(0x8c4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
594			/* lcd_data10.lcd_data10 */
595			AM33XX_IOPAD(0x8c8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
596			/* lcd_data11.lcd_data11 */
597			AM33XX_IOPAD(0x8cc, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
598			/* lcd_data12.lcd_data12 */
599			AM33XX_IOPAD(0x8d0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
600			/* lcd_data13.lcd_data13 */
601			AM33XX_IOPAD(0x8d4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
602			/* lcd_data14.lcd_data14 */
603			AM33XX_IOPAD(0x8d8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
604			/* lcd_data15.lcd_data15 */
605			AM33XX_IOPAD(0x8dc, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
606			/* lcd_vsync.lcd_vsync */
607			AM33XX_IOPAD(0x8e0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
608			/* lcd_hsync.lcd_hsync */
609			AM33XX_IOPAD(0x8e4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
610			/* lcd_pclk.lcd_pclk */
611			AM33XX_IOPAD(0x8e8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
612			/* lcd_ac_bias_en.lcd_ac_bias_en */
613			AM33XX_IOPAD(0x8ec, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
614		>;
615	};
616
617	lcd_pins_sleep: lcd-sleep-pins {
618		pinctrl-single,pins = <
619			/* lcd_data0.lcd_data0 */
620			AM33XX_IOPAD(0x8a0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
621			/* lcd_data1.lcd_data1 */
622			AM33XX_IOPAD(0x8a4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
623			/* lcd_data2.lcd_data2 */
624			AM33XX_IOPAD(0x8a8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
625			/* lcd_data3.lcd_data3 */
626			AM33XX_IOPAD(0x8ac, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
627			/* lcd_data4.lcd_data4 */
628			AM33XX_IOPAD(0x8b0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
629			/* lcd_data5.lcd_data5 */
630			AM33XX_IOPAD(0x8b4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
631			/* lcd_data6.lcd_data6 */
632			AM33XX_IOPAD(0x8b8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
633			/* lcd_data7.lcd_data7 */
634			AM33XX_IOPAD(0x8bc, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
635			/* lcd_data8.lcd_data8 */
636			AM33XX_IOPAD(0x8c0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
637			/* lcd_data9.lcd_data9 */
638			AM33XX_IOPAD(0x8c4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
639			/* lcd_data10.lcd_data10 */
640			AM33XX_IOPAD(0x8c8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
641			/* lcd_data11.lcd_data11 */
642			AM33XX_IOPAD(0x8cc, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
643			/* lcd_data12.lcd_data12 */
644			AM33XX_IOPAD(0x8d0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
645			/* lcd_data13.lcd_data13 */
646			AM33XX_IOPAD(0x8d4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
647			/* lcd_data14.lcd_data14 */
648			AM33XX_IOPAD(0x8d8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
649			/* lcd_data15.lcd_data15 */
650			AM33XX_IOPAD(0x8dc, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
651			/* lcd_vsync.lcd_vsync */
652			AM33XX_IOPAD(0x8e0, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
653			/* lcd_hsync.lcd_hsync */
654			AM33XX_IOPAD(0x8e4, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
655			/* lcd_pclk.lcd_pclk */
656			AM33XX_IOPAD(0x8e8, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
657			/* lcd_ac_bias_en.lcd_ac_bias_en */
658			AM33XX_IOPAD(0x8ec, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
659		>;
660	};
661
662	guardian_led_pins: guardian-led-pins {
663		pinctrl-single,pins = <
664			AM33XX_IOPAD(0x868, PIN_OUTPUT | MUX_MODE7) /* (T16) gpmc_a10.gpio1[26] */
665		>;
666	};
667
668	mmc1_pins: mmc1-pins {
669		pinctrl-single,pins = <
670			AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0)  /* mmc0_dat3.mmc0_dat3 */
671			AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0)  /* mmc0_dat2.mmc0_dat2 */
672			AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0)  /* mmc0_dat1.mmc0_dat1 */
673			AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0)  /* mmc0_dat0.mmc0_dat0 */
674			AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0)  /* mmc0_clk.mmc0_clk */
675			AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0)  /* mmc0_cmd.mmc0_cmd */
676			AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7)         /* GPIO0_6 */
677		>;
678	};
679
680	spi0_pins: spi0-pins {
681		pinctrl-single,pins = <
682			/* SPI0_CLK  - spi0_clk.spi */
683			AM33XX_IOPAD(0x950, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
684			/* SPI0_MOSI - spi0_d0.spi0 */
685			AM33XX_IOPAD(0x954, PIN_OUTPUT_PULLUP | MUX_MODE0)
686			/* SPI0_MISO - spi0_d1.spi0 */
687			AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0)
688			/* SPI0_CS0 - spi */
689			AM33XX_IOPAD(0x95c, PIN_OUTPUT_PULLUP | MUX_MODE0)
690		>;
691	};
692
693	uart0_pins: uart0-pins {
694		pinctrl-single,pins = <
695			/* uart0_rxd.uart0_rxd */
696			AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)
697			/* uart0_txd.uart0_txd */
698			AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
699		>;
700	};
701
702	uart2_pins: uart2-pins {
703		pinctrl-single,pins = <
704			/* K18 uart2_rxd.mirx_txd */
705			AM33XX_IOPAD(0x92c, PIN_INPUT_PULLUP | MUX_MODE1)
706			/* L18 uart2_txd.mirx_rxd */
707			AM33XX_IOPAD(0x930, PIN_OUTPUT_PULLDOWN | MUX_MODE1)
708		>;
709	};
710
711	nandflash_pins: nandflash-pins {
712		pinctrl-single,pins = <
713			/* (U7) gpmc_ad0.gpmc_ad0 */
714			AM33XX_IOPAD(0x800, PIN_INPUT | MUX_MODE0)
715			/* (V7) gpmc_ad1.gpmc_ad1 */
716			AM33XX_IOPAD(0x804, PIN_INPUT | MUX_MODE0)
717			/* (R8) gpmc_ad2.gpmc_ad2 */
718			AM33XX_IOPAD(0x808, PIN_INPUT | MUX_MODE0)
719			/* (T8) gpmc_ad3.gpmc_ad3 */
720			AM33XX_IOPAD(0x80c, PIN_INPUT | MUX_MODE0)
721			/* (U8) gpmc_ad4.gpmc_ad4 */
722			AM33XX_IOPAD(0x810, PIN_INPUT | MUX_MODE0)
723			/* (V8) gpmc_ad5.gpmc_ad5 */
724			AM33XX_IOPAD(0x814, PIN_INPUT | MUX_MODE0)
725			/* (R9) gpmc_ad6.gpmc_ad6 */
726			AM33XX_IOPAD(0x818, PIN_INPUT | MUX_MODE0)
727			/* (T9) gpmc_ad7.gpmc_ad7 */
728			AM33XX_IOPAD(0x81c, PIN_INPUT | MUX_MODE0)
729			/* (T17) gpmc_wait0.gpmc_wait0 */
730			AM33XX_IOPAD(0x870, PIN_INPUT | MUX_MODE0)
731			/* (U17) gpmc_wpn.gpmc_wpn */
732			AM33XX_IOPAD(0x874, PIN_OUTPUT | MUX_MODE0)
733			/* (V6) gpmc_csn0.gpmc_csn0 */
734			AM33XX_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0)
735			/* (R7) gpmc_advn_ale.gpmc_advn_ale */
736			AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0)
737			/* (T7) gpmc_oen_ren.gpmc_oen_ren */
738			AM33XX_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0)
739			/* (U6) gpmc_wen.gpmc_wen */
740			AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0)
741			/* (T6) gpmc_be0n_cle.gpmc_be0n_cle */
742			AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0)
743		>;
744	};
745};
746