1Kernel driver ina2xx
2====================
3
4Supported chips:
5
6  * Texas Instruments INA219
7
8
9    Prefix: 'ina219'
10    Addresses: I2C 0x40 - 0x4f
11
12    Datasheet: Publicly available at the Texas Instruments website
13
14	       https://www.ti.com/
15
16  * Texas Instruments INA220
17
18    Prefix: 'ina220'
19
20    Addresses: I2C 0x40 - 0x4f
21
22    Datasheet: Publicly available at the Texas Instruments website
23
24	       https://www.ti.com/
25
26  * Texas Instruments INA226
27
28    Prefix: 'ina226'
29
30    Addresses: I2C 0x40 - 0x4f
31
32    Datasheet: Publicly available at the Texas Instruments website
33
34	       https://www.ti.com/
35
36  * Texas Instruments INA230
37
38    Prefix: 'ina230'
39
40    Addresses: I2C 0x40 - 0x4f
41
42    Datasheet: Publicly available at the Texas Instruments website
43
44	       https://www.ti.com/
45
46  * Texas Instruments INA231
47
48    Prefix: 'ina231'
49
50    Addresses: I2C 0x40 - 0x4f
51
52    Datasheet: Publicly available at the Texas Instruments website
53
54	       https://www.ti.com/
55
56Author: Lothar Felten <lothar.felten@gmail.com>
57
58Description
59-----------
60
61The INA219 is a high-side current shunt and power monitor with an I2C
62interface. The INA219 monitors both shunt drop and supply voltage, with
63programmable conversion times and filtering.
64
65The INA220 is a high or low side current shunt and power monitor with an I2C
66interface. The INA220 monitors both shunt drop and supply voltage.
67
68The INA226 is a current shunt and power monitor with an I2C interface.
69The INA226 monitors both a shunt voltage drop and bus supply voltage.
70
71INA230 and INA231 are high or low side current shunt and power monitors
72with an I2C interface. The chips monitor both a shunt voltage drop and
73bus supply voltage.
74
75The shunt value in micro-ohms can be set via platform data or device tree at
76compile-time or via the shunt_resistor attribute in sysfs at run-time. Please
77refer to the Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml for bindings
78if the device tree is used.
79
80Additionally ina226 supports update_interval attribute as described in
81Documentation/hwmon/sysfs-interface.rst. Internally the interval is the sum of
82bus and shunt voltage conversion times multiplied by the averaging rate. We
83don't touch the conversion times and only modify the number of averages. The
84lower limit of the update_interval is 2 ms, the upper limit is 2253 ms.
85The actual programmed interval may vary from the desired value.
86
87General sysfs entries
88---------------------
89
90======================= ===============================
91in0_input		Shunt voltage(mV) channel
92in1_input		Bus voltage(mV) channel
93curr1_input		Current(mA) measurement channel
94power1_input		Power(uW) measurement channel
95shunt_resistor		Shunt resistance(uOhm) channel
96======================= ===============================
97
98Sysfs entries for ina226, ina230 and ina231 only
99------------------------------------------------
100
101======================= ====================================================
102curr1_lcrit		Critical low current
103curr1_crit		Critical high current
104curr1_lcrit_alarm	Current critical low alarm
105curr1_crit_alarm	Current critical high alarm
106in0_lcrit		Critical low shunt voltage
107in0_crit		Critical high shunt voltage
108in0_lcrit_alarm		Shunt voltage critical low alarm
109in0_crit_alarm		Shunt voltage critical high alarm
110in1_lcrit		Critical low bus voltage
111in1_crit		Critical high bus voltage
112in1_lcrit_alarm		Bus voltage critical low alarm
113in1_crit_alarm		Bus voltage critical high alarm
114power1_crit		Critical high power
115power1_crit_alarm	Power critical high alarm
116update_interval		data conversion time; affects number of samples used
117			to average results for shunt and bus voltages.
118======================= ====================================================
119
120.. note::
121
122   - Configure `shunt_resistor` before configure `power1_crit`, because power
123     value is calculated based on `shunt_resistor` set.
124   - Because of the underlying register implementation, only one `*crit` setting
125     and its `alarm` can be active. Writing to one `*crit` setting clears other
126     `*crit` settings and alarms. Writing 0 to any `*crit` setting clears all
127     `*crit` settings and alarms.
128