1# SPDX-License-Identifier: GPL-2.0-or-later
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/aspeed,ast2400-pinctrl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: ASPEED AST2400 Pin Controller
8
9maintainers:
10  - Andrew Jeffery <andrew@aj.id.au>
11
12description: |+
13  The pin controller node should be the child of a syscon node with the
14  required property:
15
16  - compatible:     Should be one of the following:
17                    "aspeed,ast2400-scu", "syscon", "simple-mfd"
18
19  Refer to the bindings described in
20  Documentation/devicetree/bindings/mfd/syscon.yaml
21
22properties:
23  compatible:
24    const: aspeed,ast2400-pinctrl
25  reg:
26    maxItems: 2
27
28additionalProperties:
29  $ref: pinmux-node.yaml#
30  additionalProperties: false
31
32  properties:
33    pins: true
34    bias-disable: true
35
36  patternProperties:
37    "^function|groups$":
38      enum:
39        - ACPI
40        - ADC0
41        - ADC1
42        - ADC10
43        - ADC11
44        - ADC12
45        - ADC13
46        - ADC14
47        - ADC15
48        - ADC2
49        - ADC3
50        - ADC4
51        - ADC5
52        - ADC6
53        - ADC7
54        - ADC8
55        - ADC9
56        - BMCINT
57        - DDCCLK
58        - DDCDAT
59        - EXTRST
60        - FLACK
61        - FLBUSY
62        - FLWP
63        - GPID
64        - GPID0
65        - GPID2
66        - GPID4
67        - GPID6
68        - GPIE0
69        - GPIE2
70        - GPIE4
71        - GPIE6
72        - I2C10
73        - I2C11
74        - I2C12
75        - I2C13
76        - I2C14
77        - I2C3
78        - I2C4
79        - I2C5
80        - I2C6
81        - I2C7
82        - I2C8
83        - I2C9
84        - LPCPD
85        - LPCPME
86        - LPCRST
87        - LPCSMI
88        - MAC1LINK
89        - MAC2LINK
90        - MDIO1
91        - MDIO2
92        - NCTS1
93        - NCTS2
94        - NCTS3
95        - NCTS4
96        - NDCD1
97        - NDCD2
98        - NDCD3
99        - NDCD4
100        - NDSR1
101        - NDSR2
102        - NDSR3
103        - NDSR4
104        - NDTR1
105        - NDTR2
106        - NDTR3
107        - NDTR4
108        - NDTS4
109        - NRI1
110        - NRI2
111        - NRI3
112        - NRI4
113        - NRTS1
114        - NRTS2
115        - NRTS3
116        - OSCCLK
117        - PWM0
118        - PWM1
119        - PWM2
120        - PWM3
121        - PWM4
122        - PWM5
123        - PWM6
124        - PWM7
125        - RGMII1
126        - RGMII2
127        - RMII1
128        - RMII2
129        - ROM16
130        - ROM8
131        - ROMCS1
132        - ROMCS2
133        - ROMCS3
134        - ROMCS4
135        - RXD1
136        - RXD2
137        - RXD3
138        - RXD4
139        - SALT1
140        - SALT2
141        - SALT3
142        - SALT4
143        - SD1
144        - SD2
145        - SGPMCK
146        - SGPMI
147        - SGPMLD
148        - SGPMO
149        - SGPSCK
150        - SGPSI0
151        - SGPSI1
152        - SGPSLD
153        - SIOONCTRL
154        - SIOPBI
155        - SIOPBO
156        - SIOPWREQ
157        - SIOPWRGD
158        - SIOS3
159        - SIOS5
160        - SIOSCI
161        - SPI1
162        - SPI1DEBUG
163        - SPI1PASSTHRU
164        - SPICS1
165        - TIMER3
166        - TIMER4
167        - TIMER5
168        - TIMER6
169        - TIMER7
170        - TIMER8
171        - TXD1
172        - TXD2
173        - TXD3
174        - TXD4
175        - UART6
176        - USB11D1
177        - USB11H2
178        - USB2D1
179        - USB2H1
180        - USBCKI
181        - VGABIOS_ROM
182        - VGAHS
183        - VGAVS
184        - VPI18
185        - VPI24
186        - VPI30
187        - VPO12
188        - VPO24
189        - WDTRST1
190        - WDTRST2
191
192allOf:
193  - $ref: pinctrl.yaml#
194
195required:
196  - compatible
197
198examples:
199  - |
200    syscon: scu@1e6e2000 {
201        compatible = "aspeed,ast2400-scu", "syscon", "simple-mfd";
202        reg = <0x1e6e2000 0x1a8>;
203        #clock-cells = <1>;
204        #reset-cells = <1>;
205
206        #address-cells = <1>;
207        #size-cells = <1>;
208        ranges = <0x0 0x1e6e2000 0x1000>;
209
210        pinctrl: pinctrl {
211            compatible = "aspeed,ast2400-pinctrl";
212
213            pinctrl_i2c3_default: i2c3_default {
214                function = "I2C3";
215                groups = "I2C3";
216            };
217
218            pinctrl_gpioh0_unbiased_default: gpioh0 {
219                pins = "A8";
220                bias-disable;
221            };
222        };
223    };
224