1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/wireless/qcom,ath10k.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Technologies ath10k wireless devices
8
9maintainers:
10  - Kalle Valo <kvalo@kernel.org>
11  - Jeff Johnson <jjohnson@kernel.org>
12
13description:
14  Qualcomm Technologies, Inc. IEEE 802.11ac devices.
15
16properties:
17  compatible:
18    enum:
19      - qcom,ath10k # SDIO-based devices
20      - qcom,ipq4019-wifi
21      - qcom,wcn3990-wifi # SNoC-based devices
22
23  reg:
24    maxItems: 1
25
26  reg-names:
27    items:
28      - const: membase
29
30  interrupts:
31    minItems: 12
32    maxItems: 17
33
34  interrupt-names:
35    minItems: 12
36    maxItems: 17
37
38  memory-region:
39    maxItems: 1
40    description:
41      Reference to the MSA memory region used by the Wi-Fi firmware
42      running on the Q6 core.
43
44  iommus:
45    minItems: 1
46    maxItems: 2
47
48  clocks:
49    minItems: 1
50    maxItems: 3
51
52  clock-names:
53    minItems: 1
54    maxItems: 3
55
56  resets:
57    maxItems: 6
58
59  reset-names:
60    items:
61      - const: wifi_cpu_init
62      - const: wifi_radio_srif
63      - const: wifi_radio_warm
64      - const: wifi_radio_cold
65      - const: wifi_core_warm
66      - const: wifi_core_cold
67
68  ext-fem-name:
69    $ref: /schemas/types.yaml#/definitions/string
70    description: Name of external front end module used.
71    enum:
72      - microsemi-lx5586
73      - sky85703-11
74      - sky85803
75
76  firmware-name:
77    maxItems: 1
78    description:
79      If present, a board or platform specific string used to lookup firmware
80      files for the device.
81
82  wifi-firmware:
83    type: object
84    additionalProperties: false
85    description: |
86      The ath10k Wi-Fi node can contain one optional firmware subnode.
87      Firmware subnode is needed when the platform does not have Trustzone.
88    properties:
89      iommus:
90        maxItems: 1
91    required:
92      - iommus
93
94  ieee80211-freq-limit: true
95
96  qcom,ath10k-calibration-data:
97    $ref: /schemas/types.yaml#/definitions/uint8-array
98    description:
99      Calibration data + board-specific data as a byte array. The length
100      can vary between hardware versions.
101
102  qcom,ath10k-calibration-variant:
103    $ref: /schemas/types.yaml#/definitions/string
104    description:
105      Unique variant identifier of the calibration data in board-2.bin
106      for designs with colliding bus and device specific ids
107
108  qcom,ath10k-pre-calibration-data:
109    $ref: /schemas/types.yaml#/definitions/uint8-array
110    description:
111      Pre-calibration data as a byte array. The length can vary between
112      hardware versions.
113
114  qcom,coexist-support:
115    $ref: /schemas/types.yaml#/definitions/uint8
116    enum: [0, 1]
117    description:
118      Indicate coex support by the hardware.
119
120  qcom,coexist-gpio-pin:
121    $ref: /schemas/types.yaml#/definitions/uint32
122    description:
123      COEX GPIO number provided to the Wi-Fi firmware.
124
125  qcom,msa-fixed-perm:
126    type: boolean
127    description:
128      Whether to skip executing an SCM call that reassigns the memory
129      region ownership.
130
131  qcom,no-msa-ready-indicator:
132    type: boolean
133    description:
134      Don't wait for MSA_READY indicator to complete init.
135
136  qcom,smem-states:
137    $ref: /schemas/types.yaml#/definitions/phandle-array
138    description: State bits used by the AP to signal the WLAN Q6.
139    items:
140      - description: Signal bits used to enable/disable low power mode
141                     on WCN in the case of WoW (Wake on Wireless).
142
143  qcom,smem-state-names:
144    description: The names of the state bits used for SMP2P output.
145    items:
146      - const: wlan-smp2p-out
147
148  qcom,snoc-host-cap-8bit-quirk:
149    type: boolean
150    description:
151      Quirk specifying that the firmware expects the 8bit version
152      of the host capability QMI request
153
154  qcom,xo-cal-data:
155    $ref: /schemas/types.yaml#/definitions/uint32
156    description:
157      XO cal offset to be configured in XO trim register.
158
159  vdd-0.8-cx-mx-supply:
160    description: Main logic power rail
161
162  vdd-1.8-xo-supply:
163    description: Crystal oscillator supply
164
165  vdd-1.3-rfa-supply:
166    description: RFA supply
167
168  vdd-3.3-ch0-supply:
169    description: Primary Wi-Fi antenna supply
170
171  vdd-3.3-ch1-supply:
172    description: Secondary Wi-Fi antenna supply
173
174required:
175  - compatible
176  - reg
177
178additionalProperties: false
179
180allOf:
181  - $ref: ieee80211.yaml#
182  - if:
183      properties:
184        compatible:
185          contains:
186            enum:
187              - qcom,ipq4019-wifi
188    then:
189      properties:
190        interrupts:
191          minItems: 17
192          maxItems: 17
193
194        interrupt-names:
195          items:
196            - const: msi0
197            - const: msi1
198            - const: msi2
199            - const: msi3
200            - const: msi4
201            - const: msi5
202            - const: msi6
203            - const: msi7
204            - const: msi8
205            - const: msi9
206            - const: msi10
207            - const: msi11
208            - const: msi12
209            - const: msi13
210            - const: msi14
211            - const: msi15
212            - const: legacy
213
214        clocks:
215          items:
216            - description: Wi-Fi command clock
217            - description: Wi-Fi reference clock
218            - description: Wi-Fi RTC clock
219
220        clock-names:
221          items:
222            - const: wifi_wcss_cmd
223            - const: wifi_wcss_ref
224            - const: wifi_wcss_rtc
225
226      required:
227        - clocks
228        - clock-names
229        - interrupts
230        - interrupt-names
231        - resets
232        - reset-names
233
234  - if:
235      properties:
236        compatible:
237          contains:
238            enum:
239              - qcom,wcn3990-wifi
240
241    then:
242      properties:
243        clocks:
244          minItems: 1
245          items:
246            - description: XO reference clock
247            - description: Qualcomm Debug Subsystem clock
248
249        clock-names:
250          minItems: 1
251          items:
252            - const: cxo_ref_clk_pin
253            - const: qdss
254
255        interrupts:
256          items:
257            - description: CE0
258            - description: CE1
259            - description: CE2
260            - description: CE3
261            - description: CE4
262            - description: CE5
263            - description: CE6
264            - description: CE7
265            - description: CE8
266            - description: CE9
267            - description: CE10
268            - description: CE11
269
270        interrupt-names: false
271
272      required:
273        - interrupts
274
275examples:
276  # SNoC
277  - |
278    #include <dt-bindings/clock/qcom,rpmcc.h>
279    #include <dt-bindings/interrupt-controller/arm-gic.h>
280
281    wifi@18800000 {
282      compatible = "qcom,wcn3990-wifi";
283      reg = <0x18800000 0x800000>;
284      reg-names = "membase";
285      memory-region = <&wlan_msa_mem>;
286      clocks = <&rpmcc RPM_SMD_RF_CLK2_PIN>;
287      clock-names = "cxo_ref_clk_pin";
288      interrupts = <GIC_SPI 413 IRQ_TYPE_LEVEL_HIGH>,
289                   <GIC_SPI 414 IRQ_TYPE_LEVEL_HIGH>,
290                   <GIC_SPI 415 IRQ_TYPE_LEVEL_HIGH>,
291                   <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
292                   <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
293                   <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
294                   <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
295                   <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
296                   <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
297                   <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
298                   <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
299                   <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>;
300      iommus = <&anoc2_smmu 0x1900>,
301               <&anoc2_smmu 0x1901>;
302      qcom,snoc-host-cap-8bit-quirk;
303      vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
304      vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
305      vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
306      vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
307      vdd-3.3-ch1-supply = <&vreg_l23a_3p3>;
308
309      wifi-firmware {
310        iommus = <&apps_smmu 0x1c02 0x1>;
311      };
312    };
313
314  # AHB
315  - |
316    #include <dt-bindings/clock/qcom,gcc-ipq4019.h>
317
318    wifi@a000000 {
319        compatible = "qcom,ipq4019-wifi";
320        reg = <0xa000000 0x200000>;
321        resets = <&gcc WIFI0_CPU_INIT_RESET>,
322                 <&gcc WIFI0_RADIO_SRIF_RESET>,
323                 <&gcc WIFI0_RADIO_WARM_RESET>,
324                 <&gcc WIFI0_RADIO_COLD_RESET>,
325                 <&gcc WIFI0_CORE_WARM_RESET>,
326                 <&gcc WIFI0_CORE_COLD_RESET>;
327        reset-names = "wifi_cpu_init",
328                      "wifi_radio_srif",
329                      "wifi_radio_warm",
330                      "wifi_radio_cold",
331                      "wifi_core_warm",
332                      "wifi_core_cold";
333        clocks = <&gcc GCC_WCSS2G_CLK>,
334                 <&gcc GCC_WCSS2G_REF_CLK>,
335                 <&gcc GCC_WCSS2G_RTC_CLK>;
336        clock-names = "wifi_wcss_cmd",
337                      "wifi_wcss_ref",
338                      "wifi_wcss_rtc";
339        interrupts = <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>,
340                     <GIC_SPI 33 IRQ_TYPE_EDGE_RISING>,
341                     <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>,
342                     <GIC_SPI 35 IRQ_TYPE_EDGE_RISING>,
343                     <GIC_SPI 36 IRQ_TYPE_EDGE_RISING>,
344                     <GIC_SPI 37 IRQ_TYPE_EDGE_RISING>,
345                     <GIC_SPI 38 IRQ_TYPE_EDGE_RISING>,
346                     <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>,
347                     <GIC_SPI 40 IRQ_TYPE_EDGE_RISING>,
348                     <GIC_SPI 41 IRQ_TYPE_EDGE_RISING>,
349                     <GIC_SPI 42 IRQ_TYPE_EDGE_RISING>,
350                     <GIC_SPI 43 IRQ_TYPE_EDGE_RISING>,
351                     <GIC_SPI 44 IRQ_TYPE_EDGE_RISING>,
352                     <GIC_SPI 45 IRQ_TYPE_EDGE_RISING>,
353                     <GIC_SPI 46 IRQ_TYPE_EDGE_RISING>,
354                     <GIC_SPI 47 IRQ_TYPE_EDGE_RISING>,
355                     <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
356        interrupt-names =  "msi0",
357                           "msi1",
358                           "msi2",
359                           "msi3",
360                           "msi4",
361                           "msi5",
362                           "msi6",
363                           "msi7",
364                           "msi8",
365                           "msi9",
366                           "msi10",
367                           "msi11",
368                           "msi12",
369                           "msi13",
370                           "msi14",
371                           "msi15",
372                           "legacy";
373        ieee80211-freq-limit = <5470000 5875000>;
374      };
375