/linux-6.12.1/arch/loongarch/include/asm/ |
D | inst.h | 279 unsigned int rj : 5; member 286 unsigned int rj : 5; member 292 unsigned int rj : 5; member 299 unsigned int rj : 5; member 306 unsigned int rj : 5; member 313 unsigned int rj : 5; member 320 unsigned int rj : 5; member 327 unsigned int rj : 5; member 335 unsigned int rj : 5; member 342 unsigned int rj : 5; member [all …]
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/linux-6.12.1/arch/loongarch/kernel/ |
D | inst.c | 48 unsigned int imm, imm_l, imm_h, rd, rj; in simu_branch() local 70 rj = insn.reg1i21_format.rj; in simu_branch() 73 if (regs->regs[rj] == 0) in simu_branch() 79 if (regs->regs[rj] != 0) in simu_branch() 87 rj = insn.reg2i16_format.rj; in simu_branch() 91 if (regs->regs[rj] == regs->regs[rd]) in simu_branch() 97 if (regs->regs[rj] != regs->regs[rd]) in simu_branch() 103 if ((long)regs->regs[rj] < (long)regs->regs[rd]) in simu_branch() 109 if ((long)regs->regs[rj] >= (long)regs->regs[rd]) in simu_branch() 115 if (regs->regs[rj] < regs->regs[rd]) in simu_branch() [all …]
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D | kgdb.c | 297 unsigned int si, si_l, si_h, rd, rj, cj; in get_step_address() local 320 rj = ip->reg1i21_format.rj; in get_step_address() 321 cj = (rj & 0x07) + DBG_FCC_BASE; in get_step_address() 327 if (regs->regs[rj] == 0) in get_step_address() 331 if (regs->regs[rj] != 0) in get_step_address() 335 if (((rj & 0x18) == 0x00) && !cj_val) /* bceqz */ in get_step_address() 337 if (((rj & 0x18) == 0x08) && cj_val) /* bcnez */ in get_step_address() 342 rj = ip->reg2i16_format.rj; in get_step_address() 347 if (regs->regs[rj] == regs->regs[rd]) in get_step_address() 351 if (regs->regs[rj] != regs->regs[rd]) in get_step_address() [all …]
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D | traps.c | 641 badv = regs->regs[insn.reg3_format.rj]; in do_bce() 648 badv = regs->regs[insn.reg3_format.rj]; in do_bce() 664 badv = regs->regs[insn.reg3_format.rj]; in do_bce() 680 badv = regs->regs[insn.reg3_format.rj]; in do_bce()
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D | alternative.c | 92 BUG_ON(buf->reg1i21_format.rj & BIT(4)); in recompute_jump()
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/linux-6.12.1/arch/loongarch/net/ |
D | bpf_jit.h | 170 enum loongarch_gpr rj) in move_reg() argument 172 emit_insn(ctx, or, rd, rj, LOONGARCH_GPR_ZERO); in move_reg() 203 static inline void cond_jmp_offset(struct jit_ctx *ctx, u8 cond, enum loongarch_gpr rj, in cond_jmp_offset() argument 209 emit_insn(ctx, beq, rj, rd, jmp_offset); in cond_jmp_offset() 214 emit_insn(ctx, bne, rj, rd, jmp_offset); in cond_jmp_offset() 218 emit_insn(ctx, bltu, rd, rj, jmp_offset); in cond_jmp_offset() 222 emit_insn(ctx, bltu, rj, rd, jmp_offset); in cond_jmp_offset() 226 emit_insn(ctx, bgeu, rj, rd, jmp_offset); in cond_jmp_offset() 230 emit_insn(ctx, bgeu, rd, rj, jmp_offset); in cond_jmp_offset() 234 emit_insn(ctx, blt, rd, rj, jmp_offset); in cond_jmp_offset() [all …]
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/linux-6.12.1/tools/arch/loongarch/include/asm/ |
D | inst.h | 67 unsigned int rj : 5; member 74 unsigned int rj : 5; member 80 unsigned int rj : 5; member 87 unsigned int rj : 5; member 94 unsigned int rj : 5; member 149 enum loongarch_gpr rj, \ 155 insn->reg2i16_format.rj = rj; \
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/linux-6.12.1/tools/objtool/arch/loongarch/ |
D | decode.c | 124 if ((inst.reg2i12_format.rd == CFI_SP) || (inst.reg2i12_format.rj == CFI_SP)) { in decode_insn_reg2i12_fomat() 129 op->src.reg = inst.reg2i12_format.rj; in decode_insn_reg2i12_fomat() 135 if ((inst.reg2i12_format.rd == CFI_SP) && (inst.reg2i12_format.rj == CFI_FP)) { in decode_insn_reg2i12_fomat() 146 if (inst.reg2i12_format.rj == CFI_SP) { in decode_insn_reg2i12_fomat() 159 if (inst.reg2i12_format.rj == CFI_SP) { in decode_insn_reg2i12_fomat() 173 inst.reg2i12_format.rj == 0 && in decode_insn_reg2i12_fomat() 192 if (inst.reg2i14_format.rj == CFI_SP) { in decode_insn_reg2i14_fomat() 205 if (inst.reg2i14_format.rj == CFI_SP) { in decode_insn_reg2i14_fomat() 235 inst.reg2i16_format.rj == CFI_RA && in decode_insn_reg2i16_fomat()
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/linux-6.12.1/arch/loongarch/kvm/ |
D | exit.c | 26 int rd, rj; in kvm_emu_cpucfg() local 33 rj = inst.reg2_format.rj; in kvm_emu_cpucfg() 35 index = vcpu->arch.gprs[rj]; in kvm_emu_cpucfg() 115 unsigned int rd, rj, csrid; in kvm_handle_csr() local 125 rj = inst.reg2csr_format.rj; in kvm_handle_csr() 137 switch (rj) { in kvm_handle_csr() 149 csr_mask = vcpu->arch.gprs[rj]; in kvm_handle_csr() 161 u32 addr, rd, rj, opcode; in kvm_emu_iocsr() local 167 rj = inst.reg2_format.rj; in kvm_emu_iocsr() 169 addr = vcpu->arch.gprs[rj]; in kvm_emu_iocsr()
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/linux-6.12.1/scripts/ |
D | check_extable.sh | 15 suspicious_relocs=$(objdump -rj __ex_table ${obj} | tail -n +6 | 55 …eval $(objdump -rj .altinstructions ${obj} | grep -B1 "${section}+${section_offset}" | head -n1 | …
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/linux-6.12.1/ |
D | MAINTAINERS | 19667 M: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
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