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Searched refs:enabled_slices (Results 1 – 6 of 6) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/i915/display/
Dskl_watermark.c55 u8 enabled_slices = 0; in intel_enabled_dbuf_slices_mask() local
60 enabled_slices |= BIT(slice); in intel_enabled_dbuf_slices_mask()
63 return enabled_slices; in intel_enabled_dbuf_slices_mask()
2473 u8 enabled_slices; in intel_dbuf_enabled_slices() local
2480 enabled_slices = BIT(DBUF_S1); in intel_dbuf_enabled_slices()
2483 enabled_slices |= dbuf_state->slices[pipe]; in intel_dbuf_enabled_slices()
2485 return enabled_slices; in intel_dbuf_enabled_slices()
2545 new_dbuf_state->enabled_slices = intel_dbuf_enabled_slices(new_dbuf_state); in skl_compute_ddb()
2547 if (old_dbuf_state->enabled_slices != new_dbuf_state->enabled_slices || in skl_compute_ddb()
2555 old_dbuf_state->enabled_slices, in skl_compute_ddb()
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Dintel_pmdemand.c279 new_dbuf_state->enabled_slices != in intel_pmdemand_needs_update()
280 old_dbuf_state->enabled_slices)) in intel_pmdemand_needs_update()
333 min_t(u8, hweight8(new_dbuf_state->enabled_slices), 3); in intel_pmdemand_atomic_check()
Dskl_watermark.h63 u8 enabled_slices; member
Dintel_display_core.h362 u8 enabled_slices; member
Dintel_display_power.c1083 dev_priv->display.dbuf.enabled_slices = req_slices; in gen9_dbuf_slices_update()
1092 dev_priv->display.dbuf.enabled_slices = in gen9_dbuf_enable()
1095 slices_mask = BIT(DBUF_S1) | dev_priv->display.dbuf.enabled_slices; in gen9_dbuf_enable()
Dintel_display_power_well.c959 u8 enabled_dbuf_slices = dev_priv->display.dbuf.enabled_slices; in gen9_assert_dbuf_enabled()