| /linux-6.12.1/drivers/gpu/drm/xe/ |
| D | xe_tuning.c | 19 { XE_RTP_NAME("Tuning: Blend Fill Caching Optimization Disable"),
23 { XE_RTP_NAME("Tuning: 32B Access Enable"),
30 { XE_RTP_NAME("Tuning: L3 cache"),
35 { XE_RTP_NAME("Tuning: L3 cache - media"),
40 { XE_RTP_NAME("Tuning: Compression Overfetch"),
45 { XE_RTP_NAME("Tuning: Compression Overfetch - media"),
50 { XE_RTP_NAME("Tuning: Enable compressible partial write overfetch in L3"),
54 { XE_RTP_NAME("Tuning: Enable compressible partial write overfetch in L3 - media"),
58 { XE_RTP_NAME("Tuning: L2 Overfetch Compressible Only"),
63 { XE_RTP_NAME("Tuning: L2 Overfetch Compressible Only - media"),
[all …]
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| /linux-6.12.1/Documentation/devicetree/bindings/mmc/ |
| D | fsl-imx-esdhc.yaml | 132 fsl,tuning-start-tap:
135 Specify the start delay cell point when send first CMD19 in tuning procedure.
138 fsl,tuning-step:
141 Specify the increasing delay cell steps in tuning procedure.
142 The uSDHC use one delay cell as default increasing step to do tuning process.
143 This property allows user to change the tuning step to more than one delay
145 tuning step can't find the proper delay window within limited tuning retries.
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| D | rockchip-dw-mshc.yaml | 46 # for Rockchip RK3576 with phase tuning inside the controller
74 to control the clock phases, "ciu-sample" is required for tuning
87 low speeds or in case where all phases work at tuning time.
96 The desired number of times that the host execute tuning when needed.
97 If not specified, the host will do tuning for 360 times,
98 namely tuning for each degree.
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| /linux-6.12.1/drivers/mmc/host/ |
| D | sdhci-esdhc-imx.c | 70 /* Tuning bits */
106 /* NOTE: the minimum valid tuning start tap for mx6sl is 1 */
154 /* The IP supports manual tuning process */
156 /* The IP supports standard tuning process */
234 unsigned int tuning_step; /* The delay cell steps in tuning procedure */
235 unsigned int tuning_start_tap; /* The start delay cell point in tuning procedure */
445 /* Enable the auto tuning circuit to check the CMD line and BUS line */
468 * For USDHC, auto tuning circuit can not handle the async sdio in usdhc_auto_tuning_mode_sel_and_en()
471 * tuning circuit check these 4 data lines, include the DAT[1], in usdhc_auto_tuning_mode_sel_and_en()
475 * device, config the auto tuning circuit only check DAT[0] and CMD in usdhc_auto_tuning_mode_sel_and_en()
[all …]
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| D | sdhci-of-esdhc.c | 436 /* Starting SW tuning requires ESDHC_SMPCLKSEL to be set in esdhc_be_writew()
462 /* Starting SW tuning requires ESDHC_SMPCLKSEL to be set in esdhc_le_writew()
1050 /* Program the software tuning mode by setting TBCTL[TB_MODE]=2'h3 */ in esdhc_execute_sw_tuning()
1073 /* For tuning mode, the sd clock divisor value in esdhc_execute_tuning()
1084 * during tuning. If the SD card is too slow sending the response, the in esdhc_execute_tuning()
1086 * is triggered. This leads to tuning errors. in esdhc_execute_tuning()
1100 /* Do HW tuning */ in esdhc_execute_tuning()
1110 /* For type2 affected platforms of the tuning erratum, in esdhc_execute_tuning()
1111 * tuning may succeed although eSDHC might not have in esdhc_execute_tuning()
1112 * tuned properly. Need to check tuning window. in esdhc_execute_tuning()
[all …]
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| D | sdhci-of-dwcmshc.c | 41 /* Tuning and auto-tuning fields in AT_CTRL_R control register */
46 #define AT_CTRL_SW_TUNE_EN BIT(4) /* enable software managed tuning */
530 * Tuning can leave the IP in an active state (Buffer Read Enable bit in dwcmshc_execute_tuning()
804 * configure tuning settings: in th1520_execute_tuning()
807 * - disable software managed tuning in th1520_execute_tuning()
809 * instead tuning calculated edges are used in th1520_execute_tuning()
815 * configure tuning settings: in th1520_execute_tuning()
816 * - enable auto-tuning in th1520_execute_tuning()
831 /* perform tuning */ in th1520_execute_tuning()
836 /* disable auto-tuning upon tuning error */ in th1520_execute_tuning()
[all …]
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| D | sdhci_am654.c | 424 * Tuning data remains in the buffer after tuning. in sdhci_am654_execute_tuning()
459 /* Retry tuning */ in sdhci_am654_calculate_itap()
460 dev_dbg(dev, "No failing region found, retry tuning\n"); in sdhci_am654_calculate_itap()
465 /* Retry tuning */ in sdhci_am654_calculate_itap()
466 dev_dbg(dev, "No passing itapdly, retry tuning\n"); in sdhci_am654_calculate_itap()
563 dev_err(dev, "Failed to find itapdly, fail tuning\n"); in sdhci_am654_platform_execute_tuning()
567 dev_dbg(dev, "Passed tuning, final itapdly=%d\n", itapdly); in sdhci_am654_platform_execute_tuning()
770 /* Enable tuning for SDR50 */ in sdhci_am654_init()
774 /* Use to re-execute tuning */ in sdhci_am654_init()
1032 /* Enable tuning for SDR50 */ in sdhci_am654_restore()
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| D | dw_mmc-hi3798mv200.c | 113 * HiSilicon implemented a tuning mechanism. in dw_mci_hi3798mv200_execute_tuning_mix_mode()
159 * We don't care what timing we are tuning for, in dw_mci_hi3798mv200_execute_tuning_mix_mode()
160 * simply use the same phase for all timing needs tuning. in dw_mci_hi3798mv200_execute_tuning_mix_mode()
167 dev_dbg(host->dev, "Tuning clk_sample[%d, %d], set[%d]\n", in dw_mci_hi3798mv200_execute_tuning_mix_mode()
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| D | sdhci-pci-o2micro.c | 204 /* enable hardware tuning */ in sdhci_o2_set_tuning_mode()
224 pr_warn("%s: HW tuning failed !\n", in __sdhci_o2_execute_tuning()
232 pr_info("%s: Tuning failed, falling back to fixed sampling clock\n", in __sdhci_o2_execute_tuning()
242 * outside of the execute tuning function.
326 * This handler implements the hardware tuning that is specific to in sdhci_o2_execute_tuning()
385 pr_warn("%s: DLL can't lock in 5ms after force L0 during tuning.\n", in sdhci_o2_execute_tuning()
388 * Judge the tuning reason, whether caused by dll shift in sdhci_o2_execute_tuning()
398 * o2 sdhci host didn't support 8bit emmc tuning in sdhci_o2_execute_tuning()
499 /* Set DLL Tuning Window */ in sdhci_pci_o2_fujin2_pci_init()
909 /* Set Tuning Window to 4 */ in sdhci_pci_o2_probe()
[all …]
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| /linux-6.12.1/drivers/ata/ |
| D | pata_cs5530.c | 49 u32 tuning; in cs5530_set_piomode() local
53 tuning = ioread32(base + 0x04); in cs5530_set_piomode()
54 format = (tuning & 0x80000000UL) ? 1 : 0; in cs5530_set_piomode()
76 u32 tuning, timing = 0; in cs5530_set_dmamode() local
80 tuning = ioread32(base + 0x04); in cs5530_set_dmamode()
99 timing |= (tuning & 0x80000000UL); in cs5530_set_dmamode()
104 tuning |= 0x00100000; /* UDMA for both */ in cs5530_set_dmamode()
106 tuning &= ~0x00100000; /* MWDMA for both */ in cs5530_set_dmamode()
107 iowrite32(tuning, base + 0x04); in cs5530_set_dmamode()
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| /linux-6.12.1/Documentation/devicetree/bindings/phy/ |
| D | realtek,usb3phy.yaml | 69 realtek,amplitude-control-coarse-tuning:
72 This value is a parameter for coarse tuning.
80 realtek,amplitude-control-fine-tuning:
83 This value is used for fine-tuning parameters.
106 realtek,amplitude-control-coarse-tuning = <0x77>;
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| D | qcom,qusb2-phy.yaml | 79 tuning parameter value for qusb2 phy.
90 tuning parameter that may vary for different boards of same SOC.
99 tuning parameter that may vary for different boards of same SOC.
108 tuning parameter that may vary for different boards of same SOC.
116 It is a 4 bit value that specifies tuning for HSTX
148 It is a 2 bit value tuning parameter that control disconnect
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| D | phy-stm32-usbphyc.yaml | 118 st,enable-fs-rftime-tuning:
119 description: Enables the FS rise/fall tuning option
152 Controls HS driver impedance tuning for choke compensation
259 st,enable-fs-rftime-tuning;
277 st,enable-fs-rftime-tuning;
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| /linux-6.12.1/Documentation/userspace-api/media/dvb/ |
| D | fe-set-frontend.rst | 31 Points to parameters for tuning operation.
36 This ioctl call starts a tuning operation using specified parameters.
38 and the tuning could be initiated. The result of the tuning operation in
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| /linux-6.12.1/Documentation/devicetree/bindings/regulator/ |
| D | mediatek,mt6358-regulator.yaml | 79 description: LDOs with fixed 1.2V output and 0~100/10mV tuning
88 LDOs with fixed 1.8V output and 0~100/10mV tuning (vcn18 on MT6366 has variable output)
96 description: LDOs with fixed 2.2V output and 0~100/10mV tuning
104 description: LDOs with fixed 2.8V output and 0~100/10mV tuning
112 description: LDOs with fixed 3.0V output and 0~100/10mV tuning
128 description: LDOs with variable output and 0~100/10mV tuning
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| /linux-6.12.1/include/linux/mmc/ |
| D | host.h | 179 /* The tuning command opcode value is different for SD and eMMC cards */
185 /* Execute HS400 tuning depending host driver */
188 /* Optional callback to prepare for SD high-speed tuning */
191 /* Optional callback to execute SD high-speed tuning */
429 unsigned int doing_init_tune:1; /* initial tuning in progress */
430 unsigned int can_retune:1; /* re-tuning can be used */
431 unsigned int doing_retune:1; /* re-tuning in progress */
432 unsigned int retune_now:1; /* do re-tuning at next req */
433 unsigned int retune_paused:1; /* re-tuning is temporarily disabled */
441 int need_retune; /* re-tuning is needed */
[all …]
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| /linux-6.12.1/Documentation/devicetree/bindings/iio/proximity/ |
| D | ams,as3935.yaml | 31 ams,tuning-capacitor-pf:
34 Calibration tuning capacitor stepping value. This will require using
70 ams,tuning-capacitor-pf = <80>;
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| /linux-6.12.1/Documentation/ABI/testing/ |
| D | sysfs-fs-ext4 | 15 requests to a multiple of this tuning parameter if the
36 Tuning parameter which controls the minimum size for
55 Tuning parameter which controls the maximum number of
87 Tuning parameter which (if non-zero) controls the goal
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| /linux-6.12.1/drivers/net/wireless/ralink/rt2x00/ |
| D | rt2x00link.c | 10 Abstract: rt2x00 generic link tuning routines.
232 * While scanning, link tuning is disabled. By default in rt2x00link_start_tuner()
265 * device should only perform link tuning during the in rt2x00link_reset_tuner()
309 * Update quality RSSI for link tuning, in rt2x00link_tuner_sta()
320 * Check if link tuning is supported by the hardware, some hardware in rt2x00link_tuner_sta()
321 * do not support link tuning at all, while other devices can disable in rt2x00link_tuner_sta()
349 * immediately cease all link tuning. in rt2x00link_tuner()
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| /linux-6.12.1/drivers/staging/iio/Documentation/ |
| D | sysfs-bus-iio-dds | 6 Stores frequency into tuning word Y.
10 can control the desired active tuning word by writing Y to the
26 Specifies the active output frequency tuning word. The value
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| /linux-6.12.1/drivers/staging/iio/frequency/ |
| D | ad9832.h | 17 * @freq0: power up freq0 tuning word in Hz
18 * @freq1: power up freq1 tuning word in Hz
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| D | ad9832.c | 85 * @freq_xfer: tuning word spi transfer
86 * @freq_msg: tuning word spi message
87 * @phase_xfer: tuning word spi transfer
88 * @phase_msg: tuning word spi message
91 * @phase_data: tuning word spi transmit buffer
92 * @freq_data: tuning word spi transmit buffer
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| /linux-6.12.1/drivers/gpu/drm/amd/pm/swsmu/inc/ |
| D | smu_v13_0_pptable.h | 70 …URE_MEMORY_TIMING_TUNE = 1 << SMU_13_0_ODCAP_MEMORY_TIMING_TUNE, //AC Timing Tuning feature
153 …od_turbo_power_limit; //Power limit setting for Turbo mode in Performance UI Tuning.
154 …e_power_limit; //Power limit setting for PowerSave/Optimal mode in Performance UI Tuning.
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| D | smu_v11_0_pptable.h | 70 …URE_MEMORY_TIMING_TUNE = 1 << SMU_11_0_ODCAP_MEMORY_TIMING_TUNE, //AC Timing Tuning feature
151 …od_turbo_power_limit; //Power limit setting for Turbo mode in Performance UI Tuning.
152 …e_power_limit; //Power limit setting for PowerSave/Optimal mode in Performance UI Tuning.
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| /linux-6.12.1/Documentation/admin-guide/sysctl/ |
| D | index.rst | 72 filehandle, inode, dentry and quota tuning
74 kernel/ global kernel info / tuning
80 vm/ memory management tuning
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