Searched +full:r9a07g044 +full:- +full:pinctrl (Results 1 – 8 of 8) sorted by relevance
/linux-6.12.1/Documentation/devicetree/bindings/pinctrl/ |
D | renesas,rzg2l-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/renesas,rzg2l-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Geert Uytterhoeven <geert+renesas@glider.be> 11 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> 16 Pin multiplexing and GPIO configuration is performed on a per-pin basis. 24 - items: 25 - enum: 26 - renesas,r9a07g043-pinctrl # RZ/G2UL{Type-1,Type-2} and RZ/Five [all …]
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D | renesas,rzg2l-poeg.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/renesas,rzg2l-poeg.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Biju Das <biju.das.jz@bp.renesas.com> 17 * Output-disable request from the GPT. 26 - enum: 27 - renesas,r9a07g044-poeg # RZ/G2{L,LC} 28 - renesas,r9a07g054-poeg # RZ/V2L 29 - const: renesas,rzg2l-poeg [all …]
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/linux-6.12.1/arch/arm64/boot/dts/renesas/ |
D | r9a07g044.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/clock/r9a07g044-cpg.h> 12 compatible = "renesas,r9a07g044"; 13 #address-cells = <2>; 14 #size-cells = <2>; 16 audio_clk1: audio1-clk { 17 compatible = "fixed-clock"; 18 #clock-cells = <0>; 20 clock-frequency = <0>; [all …]
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D | r9a07g054.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/clock/r9a07g054-cpg.h> 13 #address-cells = <2>; 14 #size-cells = <2>; 16 audio_clk1: audio1-clk { 17 compatible = "fixed-clock"; 18 #clock-cells = <0>; 20 clock-frequency = <0>; 23 audio_clk2: audio2-clk { [all …]
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D | r9a07g043.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 8 #include <dt-bindings/clock/r9a07g043-cpg.h> 12 #address-cells = <2>; 13 #size-cells = <2>; 15 audio_clk1: audio1-clk { 16 compatible = "fixed-clock"; 17 #clock-cells = <0>; 19 clock-frequency = <0>; 22 audio_clk2: audio2-clk { 23 compatible = "fixed-clock"; [all …]
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D | r9a08g045.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/clock/r9a08g045-cpg.h> 13 #address-cells = <2>; 14 #size-cells = <2>; 17 #address-cells = <1>; 18 #size-cells = <0>; 21 compatible = "arm,cortex-a55"; 24 #cooling-cells = <2>; 25 next-level-cache = <&L3_CA55>; [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/mmc/ |
D | renesas,sdhi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Wolfram Sang <wsa+renesas@sang-engineering.com> 15 - enum: 16 - renesas,sdhi-mmc-r8a77470 # RZ/G1C 17 - renesas,sdhi-r7s72100 # RZ/A1H 18 - renesas,sdhi-r7s9210 # SH-Mobile AG5 19 - renesas,sdhi-r8a73a4 # R-Mobile APE6 20 - renesas,sdhi-r8a7740 # R-Mobile A1 [all …]
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/linux-6.12.1/drivers/pinctrl/renesas/ |
D | pinctrl-rzg2l.c | 1 // SPDX-License-Identifier: GPL-2.0 23 #include <linux/pinctrl/consumer.h> 24 #include <linux/pinctrl/pinconf-generic.h> 25 #include <linux/pinctrl/pinconf.h> 26 #include <linux/pinctrl/pinctrl.h> 27 #include <linux/pinctrl/pinmux.h> 29 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h> 35 #define DRV_NAME "pinctrl-rzg2l" 60 #define PIN_CFG_NOD BIT(15) /* N-ch Open Drain */ 61 #define PIN_CFG_SMT BIT(16) /* Schmitt-trigger input control */ [all …]
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