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/linux-6.12.1/Documentation/devicetree/bindings/arm/mediatek/
Dmediatek,mt7622-pcie-mirror.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/mediatek/mediatek,mt7622-pcie-mirror.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek PCIE Mirror Controller for MT7622
10 - Lorenzo Bianconi <lorenzo@kernel.org>
11 - Felix Fietkau <nbd@nbd.name>
14 The mediatek PCIE mirror provides a configuration interface for PCIE
20 - enum:
21 - mediatek,mt7622-pcie-mirror
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/net/
Dmediatek,net.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Bianconi <lorenzo@kernel.org>
11 - Felix Fietkau <nbd@nbd.name>
20 - mediatek,mt2701-eth
21 - mediatek,mt7623-eth
22 - mediatek,mt7621-eth
23 - mediatek,mt7622-eth
24 - mediatek,mt7629-eth
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/linux-6.12.1/arch/powerpc/boot/dts/fsl/
Dge_imp3a.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2010-2011 GE Intelligent Platforms Embedded Systems, Inc.
11 /include/ "p2020si-pre.dtsi"
33 /* nor@0,0 is a mirror of part of the memory in nor@1,0
35 #address-cells = <1>;
36 #size-cells = <1>;
37 compatible = "ge,imp3a-firmware-mirror", "cfi-flash";
39 bank-width = <2>;
40 device-width = <1>;
45 read-only;
[all …]
Dgef_sbc310.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
14 * Compiled with dtc -I dts -O dtb -o gef_sbc310.dtb gef_sbc310.dts
17 /include/ "mpc8641si-pre.dtsi"
37 /* flash@0,0 is a mirror of part of the memory in flash@1,0
39 compatible = "gef,sbc310-firmware-mirror", "cfi-flash";
41 bank-width = <2>;
42 device-width = <2>;
43 #address-cells = <1>;
44 #size-cells = <1>;
48 read-only;
[all …]
Dgef_ppc9a.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
14 * Compiled with dtc -I dts -O dtb -o gef_ppc9a.dtb gef_ppc9a.dts
17 /include/ "mpc8641si-pre.dtsi"
37 6 0 0xfd000000 0x00800000 // IO FPGA (8-bit)
38 7 0 0xfd800000 0x00800000>; // IO FPGA (32-bit)
40 /* flash@0,0 is a mirror of part of the memory in flash@1,0
42 compatible = "gef,ppc9a-firmware-mirror", "cfi-flash";
44 bank-width = <4>;
45 device-width = <2>;
46 #address-cells = <1>;
[all …]
Dgef_sbc610.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
14 * Compiled with dtc -I dts -O dtb -o gef_sbc610.dtb gef_sbc610.dts
17 /include/ "mpc8641si-pre.dtsi"
37 6 0 0xfd000000 0x00800000 // IO FPGA (8-bit)
38 7 0 0xfd800000 0x00800000>; // IO FPGA (32-bit)
40 /* flash@0,0 is a mirror of part of the memory in flash@1,0
42 compatible = "gef,sbc610-firmware-mirror", "cfi-flash";
44 bank-width = <4>;
45 device-width = <2>;
46 #address-cells = <1>;
[all …]
/linux-6.12.1/drivers/net/ethernet/netronome/nfp/
Dnfp_abi.h1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
19 * enum nfp_mbox_cmd - PF mailbox commands
25 * Input - struct nfp_shared_buf_pool_id
26 * Output - struct nfp_shared_buf_pool_info_get
29 * Input - struct nfp_shared_buf_pool_info_set
30 * Output - None
32 * @NFP_MBOX_PCIE_ABM_ENABLE: enable PCIe-side advanced buffer management
33 * Enable advanced buffer management of the PCIe block. If ABM is disabled
34 * PCIe block maintains a very short queue of buffers and does tail drop.
36 * Input - None
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/linux-6.12.1/Documentation/networking/
Drepresentors.rst1 .. SPDX-License-Identifier: GPL-2.0
9 used to control internal switching on SmartNICs. For the closely-related port
10 representors on physical (multi-port) switches, see
14 ----------
16 Since the mid-2010s, network cards have started offering more complex
17 virtualisation capabilities than the legacy SR-IOV approach (with its simple
18 MAC/VLAN-based switching model) can support. This led to a desire to offload
19 software-defined networks (such as OpenVSwitch) to these NICs to specify the
24 virtual switches and IOV devices. Just as each physical port of a Linux-
42 -----------
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/linux-6.12.1/Documentation/firmware-guide/acpi/apei/
Doutput_format.rst1 .. SPDX-License-Identifier: GPL-2.0
28 PCIe error | unknown, <uuid string>
32 <pcie section data> | <null>
55 [cache error][, TLB error][, bus error][, micro-architectural error]
81 unknown | no error | single-bit ECC | multi-bit ECC | \
82 single-symbol chipkill ECC | multi-symbol chipkill ECC | master abort | \
84 mirror Broken | memory sparing | scrub corrected error | \
87 <pcie section data> :=
88 [port_type: <integer>, <pcie port type string>]
104 <pcie port type string>* := PCIe end point | legacy PCI end point | \
[all …]
/linux-6.12.1/Documentation/networking/device_drivers/ethernet/marvell/
Docteontx2.rst1 .. SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
12 - `Overview`_
13 - `Drivers`_
14 - `Basic packet flow`_
15 - `Devlink health reporters`_
16 - `Quality of service`_
23 PCI-compatible physical and virtual functions. Each functional block
25 RVU supports multiple PCIe SRIOV physical functions (PFs) and virtual
31 - Network pool or buffer allocator (NPA)
32 - Network interface controller (NIX)
[all …]
/linux-6.12.1/arch/arm64/boot/dts/mediatek/
Dmt7622.dtsi6 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/clock/mt7622-clk.h>
12 #include <dt-bindings/phy/phy.h>
13 #include <dt-bindings/power/mt7622-power.h>
14 #include <dt-bindings/reset/mt7622-reset.h>
15 #include <dt-bindings/thermal/thermal.h>
19 interrupt-parent = <&sysirq>;
20 #address-cells = <2>;
[all …]
/linux-6.12.1/Documentation/mm/
Dhmm.rst5 Provide infrastructure and helpers to integrate non-conventional memory (device
21 CPU page-table mirroring works and the purpose of HMM in this context. The
52 complex data set needs to re-map all the pointer relations between each of its
81 If we only consider the PCIE bus, then a device can access main memory (often
88 Another crippling factor is the limited bandwidth (~32GBytes/s with PCIE 4.0
93 Some platforms are developing new I/O buses or additions/modifications to PCIE
95 two-way cache coherency between CPU and device and allow all atomic operations the
115 allocate a buffer (or use a pool of pre-allocated buffers) and write GPU
136 With these two features, HMM not only allows a device to mirror process address
147 device driver that wants to mirror a process address space must start with the
[all …]
/linux-6.12.1/drivers/firmware/efi/
Dcper.c1 // SPDX-License-Identifier: GPL-2.0
32 * multiple boot may co-exist in ERST.
73 * cper_print_bits - print strings for set bits
103 len += scnprintf(buf+len, sizeof(buf)-len, ", %s", str); in cper_print_bits()
127 "micro-architectural error",
147 if (proc->validation_bits & CPER_PROC_VALID_TYPE) in cper_print_proc_generic()
148 printk("%s""processor_type: %d, %s\n", pfx, proc->proc_type, in cper_print_proc_generic()
149 proc->proc_type < ARRAY_SIZE(proc_type_strs) ? in cper_print_proc_generic()
150 proc_type_strs[proc->proc_type] : "unknown"); in cper_print_proc_generic()
151 if (proc->validation_bits & CPER_PROC_VALID_ISA) in cper_print_proc_generic()
[all …]
/linux-6.12.1/drivers/net/ethernet/mediatek/
Dmtk_wed.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/dma-mapping.h>
95 regmap_update_bits(dev->hw->regs, reg, mask | val, val); in wed_m32()
131 return readl(dev->wlan.base + reg); in wifi_r32()
137 writel(val, dev->wlan.base + reg); in wifi_w32()
157 if (!mtk_wed_is_v3_or_greater(dev->hw)) in mtk_wdma_v3_rx_reset()
166 dev_err(dev->hw->dev, "rx reset failed\n"); in mtk_wdma_v3_rx_reset()
171 dev_err(dev->hw->dev, "rx reset failed\n"); in mtk_wdma_v3_rx_reset()
179 dev_err(dev->hw->dev, "rx reset failed\n"); in mtk_wdma_v3_rx_reset()
184 dev_err(dev->hw->dev, "rx reset failed\n"); in mtk_wdma_v3_rx_reset()
[all …]
/linux-6.12.1/drivers/net/ethernet/intel/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
30 in the format 123456-001 (six digits hyphen three digits).
62 tristate "Intel(R) PRO/1000 PCI-Express Gigabit Ethernet support"
67 This driver supports the PCI-Express Intel(R) PRO/1000 gigabit
68 ethernet family of adapters. For PCI or PCI-X e1000 adapters,
82 bool "Support HW cross-timestamp on PCH devices"
86 Say Y to enable hardware supported cross-timestamping on PCH
87 devices. The cross-timestamp is available through the PTP clock
88 driver precise cross-timestamp ioctl (PTP_SYS_OFFSET_PRECISE).
91 tristate "Intel(R) 82575/82576 PCI-Express Gigabit Ethernet support"
[all …]
/linux-6.12.1/drivers/scsi/smartpqi/
Dsmartpqi.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * driver for Microchip PQI-based storage controllers
4 * Copyright (c) 2019-2023 Microchip Technology Inc. and its subsidiaries
5 * Copyright (c) 2016-2018 Microsemi Corporation
6 * Copyright (c) 2016 PMC-Sierra, Inc.
12 #include <linux/io-64-nonatomic-lo-hi.h>
18 #include <linux/bsg-lib.h>
31 u8 admin_iq_element_length; /* in 16-byte units */
32 u8 admin_oq_element_length; /* in 16-byte units */
33 __le16 max_reset_timeout; /* in 100-millisecond units */
[all …]
/linux-6.12.1/drivers/scsi/
Dhpsa_cmd.h3 * Copyright (c) 2019-2020 Microchip Technology Inc. and its subsidiaries
5 * Copyright 2014-2015 PMC-Sierra, Inc.
6 * Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P.
207 /* SCSI-3 Commands */
243 __le16 metadata_disks_per_row;/* mirror/parity disk entries / row
246 __le16 layout_map_count; /* layout maps (1 map per mirror/parity
267 #define GET_BMIC_DRIVE_NUMBER(lunid) (((GET_BMIC_BUS((lunid)) - 1) << 8) + \
272 u8 lun_count; /* multi-lun device, how many luns */
393 u8 offense_num; /* byte # of offense 0-base */
414 #define DIRECT_LOOKUP_MASK (~((1 << DIRECT_LOOKUP_SHIFT) - 1))
[all …]
/linux-6.12.1/Documentation/PCI/
Dpci.rst1 .. SPDX-License-Identifier: GPL-2.0
7 :Authors: - Martin Mares <mj@ucw.cz>
8 - Grant Grundler <grundler@parisc-linux.org>
11 Since each CPU architecture implements different chip-sets and PCI devices
18 by Jonathan Corbet, Alessandro Rubini, and Greg Kroah-Hartman.
26 "Linux PCI" <linux-pci@atrey.karlin.mff.cuni.cz> mailing list.
38 supporting hot-pluggable PCI, CardBus, and Express-Card in a single driver].
45 - Enable the device
46 - Request MMIO/IOP resources
47 - Set the DMA mask size (for both coherent and streaming DMA)
[all …]
/linux-6.12.1/drivers/net/ethernet/chelsio/cxgb4/
Dcxgb4_main.c4 * Copyright (c) 2003-2016 Chelsio Communications, Inc. All rights reserved.
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
109 /* Include PCI Device IDs for both PF4 and PF0-3 so our PCI probe() routine is
126 #define FW4_CFNAME "cxgb4/t4-config.txt"
127 #define FW5_CFNAME "cxgb4/t5-config.txt"
128 #define FW6_CFNAME "cxgb4/t6-config.txt"
144 * order MSI-X, MSI, legacy INTx interrupts. This parameter determines which
154 MODULE_PARM_DESC(msi, "whether to use INTx (0), MSI (1) or MSI-X (2)");
158 * offset by 2 bytes in order to have the IP headers line up on 4-byte
[all …]
/linux-6.12.1/Documentation/admin-guide/
Dkernel-parameters.txt16 force -- enable ACPI if default was off
17 on -- enable ACPI but allow fallback to DT [arm64,riscv64]
18 off -- disable ACPI if default was on
19 noirq -- do not use ACPI for IRQ routing
20 strict -- Be less tolerant of platforms that are not
22 rsdt -- prefer RSDT over (default) XSDT
23 copy_dsdt -- copy DSDT to memory
24 nospcr -- disable console in ACPI SPCR table as
41 If set to vendor, prefer vendor-specific driver
73 Documentation/firmware-guide/acpi/debug.rst for more information about
[all …]
/linux-6.12.1/drivers/net/ethernet/sfc/siena/
Dfarch_regs.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2005-2006 Fen Systems Ltd.
5 * Copyright 2006-2012 Solarflare Communications Inc.
15 * F<type>_<min-rev><max-rev>_
20 * -------------------------------------------------------------
25 * <min-rev> is the first revision to which the definition applies:
32 * then <max-rev> is the last revision to which the definition applies;
191 /* EE_BASE_PAGE_REG: Expansion ROM base mirror register */
252 /* PCIE_CORE_INDIRECT_REG: Indirect Access to PCIE Core registers */
684 /* DRIVER_REG: Driver scratch register [0-7] */
[all …]
/linux-6.12.1/drivers/net/ethernet/sfc/falcon/
Dfarch_regs.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2005-2006 Fen Systems Ltd.
5 * Copyright 2006-2012 Solarflare Communications Inc.
15 * F<type>_<min-rev><max-rev>_
20 * -------------------------------------------------------------
25 * <min-rev> is the first revision to which the definition applies:
32 * then <max-rev> is the last revision to which the definition applies;
191 /* EE_BASE_PAGE_REG: Expansion ROM base mirror register */
252 /* PCIE_CORE_INDIRECT_REG: Indirect Access to PCIE Core registers */
684 /* DRIVER_REG: Driver scratch register [0-7] */
[all …]
/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Damdgpu_device.c35 #include <linux/pci-p2pdma.h>
36 #include <linux/apple-gmux.h>
86 #include <asm/intel-family.h>
99 #define AMDGPU_RETRY_SRIOV_RESET(r) ((r) == -EBUSY || (r) == -ETIMEDOUT || (r) == -EINVAL)
153 * of PCIe replays (NAKs)
202 return -EINVAL; in amdgpu_sysfs_reg_state_get()
218 ret = sysfs_create_bin_file(&adev->dev->kobj, &bin_attr_reg_state); in amdgpu_reg_state_sysfs_init()
227 sysfs_remove_bin_file(&adev->dev->kobj, &bin_attr_reg_state); in amdgpu_reg_state_sysfs_fini()
240 * - "cem" - PCIE CEM card
241 * - "oam" - Open Compute Accelerator Module
[all …]
/linux-6.12.1/include/uapi/linux/
Dcomedi.h1 /* SPDX-License-Identifier: LGPL-2.0+ WITH Linux-syscall-note */
6 * COMEDI - Linux Control and Measurement Device Interface
7 * Copyright (C) 1998-2001 David A. Schleef <ds@schleef.org>
32 * NOTE: 'comedi_config --init-data' is deprecated
40 /* length of nth chunk of firmware data -*/
78 /* counters -- these are arbitrary values */
120 /* try to use a real-time interrupt while performing command */
123 /* wake up on end-of-scan events */
166 #define TRIG_INT 0x00000080 /* trigger on comedi-internal signal N */
179 #define SDF_PWM_HBRIDGE 0x0100 /* PWM is signed (H-bridge) */
[all …]
/linux-6.12.1/drivers/misc/cxl/
Dpci.c1 // SPDX-License-Identifier: GPL-2.0-or-later
18 #include <asm/pnv-pci.h>
89 #define AFUD_READ(afu, off) in_be64(afu->native->afu_desc_mmio + off)
90 #define AFUD_READ_LE(afu, off) in_le64(afu->native->afu_desc_mmio + off)
161 dev_info(&dev->dev, "dump_cxl_config_space\n"); in dump_cxl_config_space()
164 dev_info(&dev->dev, "BAR0: %#.8x\n", val); in dump_cxl_config_space()
166 dev_info(&dev->dev, "BAR1: %#.8x\n", val); in dump_cxl_config_space()
168 dev_info(&dev->dev, "BAR2: %#.8x\n", val); in dump_cxl_config_space()
170 dev_info(&dev->dev, "BAR3: %#.8x\n", val); in dump_cxl_config_space()
172 dev_info(&dev->dev, "BAR4: %#.8x\n", val); in dump_cxl_config_space()
[all …]

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