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/linux-6.12.1/arch/arm64/boot/dts/nuvoton/
Dma35d1.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 * Author: Shan-Chun Hung <schung@nuvoton.com>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/clock/nuvoton,ma35d1-clk.h>
12 #include <dt-bindings/reset/nuvoton,ma35d1-reset.h>
15 compatible = "nuvoton,ma35d1";
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
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Dma35d1-som-256m.dts1 // SPDX-License-Identifier: GPL-2.0
4 * Author: Shan-Chun Hung <schung@nuvoton.com>
8 /dts-v1/;
9 #include "ma35d1.dtsi"
12 model = "Nuvoton MA35D1-SOM";
13 compatible = "nuvoton,ma35d1-som", "nuvoton,ma35d1";
24 stdout-path = "serial0:115200n8";
32 clk_hxt: clock-hxt {
33 compatible = "fixed-clock";
34 #clock-cells = <0>;
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Dma35d1-iot-512m.dts1 // SPDX-License-Identifier: GPL-2.0
4 * Author: Shan-Chun Hung <schung@nuvoton.com>
8 /dts-v1/;
9 #include "ma35d1.dtsi"
12 model = "Nuvoton MA35D1-IoT";
13 compatible = "nuvoton,ma35d1-iot", "nuvoton,ma35d1";
24 stdout-path = "serial0:115200n8";
32 clk_hxt: clock-hxt {
33 compatible = "fixed-clock";
34 #clock-cells = <0>;
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/linux-6.12.1/Documentation/devicetree/bindings/clock/
Dnuvoton,ma35d1-clk.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/nuvoton,ma35d1-clk.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Nuvoton MA35D1 Clock Controller Module
10 - Chi-Fang Li <cfli0@nuvoton.com>
11 - Jacky Huang <ychuang3@nuvoton.com>
14 The MA35D1 clock controller generates clocks for the whole chip,
18 include/dt-bindings/clock/ma35d1-clk.h
23 - const: nuvoton,ma35d1-clk
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/linux-6.12.1/Documentation/devicetree/bindings/phy/
Dnuvoton,ma35d1-usb2-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/nuvoton,ma35d1-usb2-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Nuvoton MA35D1 USB2 phy
10 - Hui-Ping Chen <hpchen0nvt@gmail.com>
15 - nuvoton,ma35d1-usb2-phy
17 "#phy-cells":
29 - compatible
30 - "#phy-cells"
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/linux-6.12.1/Documentation/devicetree/bindings/rtc/
Dnuvoton,ma35d1-rtc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/rtc/nuvoton,ma35d1-rtc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Nuvoton MA35D1 Real Time Clock
10 - Min-Jen Chen <mjchen@nuvoton.com>
13 - $ref: rtc.yaml#
18 - nuvoton,ma35d1-rtc
30 - compatible
31 - reg
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/linux-6.12.1/Documentation/devicetree/bindings/serial/
Dnuvoton,ma35d1-serial.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/serial/nuvoton,ma35d1-serial.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Nuvoton MA35D1 Universal Asynchronous Receiver/Transmitter (UART)
10 - Min-Jen Chen <mjchen@nuvoton.com>
11 - Jacky Huang <ychuang3@nuvoton.com>
14 - $ref: serial.yaml
18 const: nuvoton,ma35d1-uart
30 - compatible
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/linux-6.12.1/Documentation/devicetree/bindings/mmc/
Dnuvoton,ma35d1-sdhci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/nuvoton,ma35d1-sdhci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Nuvoton MA35D1 SD/SDIO/MMC Controller
10 - Shan-Chun Hung <shanchun1218@gmail.com>
13 - $ref: sdhci-common.yaml#
18 - nuvoton,ma35d1-sdhci
29 pinctrl-names:
32 - const: default
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/linux-6.12.1/drivers/clk/nuvoton/
DMakefile1 # SPDX-License-Identifier: GPL-2.0-only
2 obj-$(CONFIG_CLK_MA35D1) += clk-ma35d1.o
3 obj-$(CONFIG_CLK_MA35D1) += clk-ma35d1-divider.o
4 obj-$(CONFIG_CLK_MA35D1) += clk-ma35d1-pll.o
Dclk-ma35d1-pll.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Author: Chi-Fang Li <cfli0@nuvoton.com>
8 #include <linux/clk-provider.h>
16 #include <dt-bindings/clock/nuvoton,ma35d1-clk.h>
18 #include "clk-ma35d1.h"
133 return -EINVAL; in ma35d1_pll_find_closest()
135 if (pll->mode == PLL_MODE_INT) { in ma35d1_pll_find_closest()
155 if (pll->mode != PLL_MODE_INT) in ma35d1_pll_find_closest()
167 diff = abs(rate - fout); in ma35d1_pll_find_closest()
181 return -EINVAL; /* cannot find even one valid setting */ in ma35d1_pll_find_closest()
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Dclk-ma35d1-divider.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Author: Chi-Fang Li <cfli0@nuvoton.com>
7 #include <linux/clk-provider.h>
12 #include "clk-ma35d1.h"
35 val = readl_relaxed(dclk->reg) >> dclk->shift; in ma35d1_clkdiv_recalc_rate()
36 val &= clk_div_mask(dclk->width); in ma35d1_clkdiv_recalc_rate()
38 return divider_recalc_rate(hw, parent_rate, val, dclk->table, in ma35d1_clkdiv_recalc_rate()
39 CLK_DIVIDER_ROUND_CLOSEST, dclk->width); in ma35d1_clkdiv_recalc_rate()
46 return divider_round_rate(hw, rate, prate, dclk->table, in ma35d1_clkdiv_round_rate()
47 dclk->width, CLK_DIVIDER_ROUND_CLOSEST); in ma35d1_clkdiv_round_rate()
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Dclk-ma35d1.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Author: Chi-Fang Li <cfli0@nuvoton.com>
7 #include <linux/clk-provider.h>
13 #include <dt-bindings/clock/nuvoton,ma35d1-clk.h>
15 #include "clk-ma35d1.h"
117 { .index = -1, },
118 { .index = -1, },
120 { .index = -1, },
128 { .index = -1, },
129 { .index = -1, },
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/linux-6.12.1/Documentation/devicetree/bindings/pinctrl/
Dnuvoton,ma35d1-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/nuvoton,ma35d1-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Nuvoton MA35D1 pin control and GPIO
10 - Shan-Chun Hung <schung@nuvoton.com>
11 - Jacky Huang <ychuang3@nuvoton.com>
14 - $ref: pinctrl.yaml#
19 - nuvoton,ma35d1-pinctrl
24 '#address-cells':
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/linux-6.12.1/drivers/phy/nuvoton/
Dphy-ma35d1-usb2.c1 // SPDX-License-Identifier: GPL-2.0
6 #include <linux/clk.h>
19 #define PHY0POR BIT(0) /* PHY Power-On Reset Control Bit */
21 #define PHY0COMN BIT(2) /* PHY Common Block Power-Down Control */
25 struct clk *clk; member
36 ret = clk_prepare_enable(p_phy->clk); in ma35_usb_phy_power_on()
38 dev_err(p_phy->dev, "Failed to enable PHY clock: %d\n", ret); in ma35_usb_phy_power_on()
42 regmap_read(p_phy->sysreg, MA35_SYS_REG_USBPMISCR, &val); in ma35_usb_phy_power_on()
48 ret = regmap_read_poll_timeout(p_phy->sysreg, MA35_SYS_REG_USBPMISCR, val, in ma35_usb_phy_power_on()
58 regmap_update_bits(p_phy->sysreg, MA35_SYS_REG_USBPMISCR, 0x7, (PHY0POR | PHY0SUSPEND)); in ma35_usb_phy_power_on()
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/linux-6.12.1/drivers/rtc/
Drtc-ma35d1.c1 // SPDX-License-Identifier: GPL-2.0
3 * RTC driver for Nuvoton MA35D1
9 #include <linux/clk.h>
18 /* MA35D1 RTC Control Registers */
62 return __raw_readl(p->rtc_reg + offset); in rtc_reg_read()
67 __raw_writel(value, p->rtc_reg + offset); in rtc_reg_write()
82 rtc_update_irq(rtc->rtcdev, 1, events); in ma35d1_rtc_interrupt()
101 return -ETIMEDOUT; in ma35d1_rtc_init()
131 tm->tm_mday = bcd2bin(cal >> 0); in ma35d1_rtc_read_time()
132 tm->tm_wday = wday; in ma35d1_rtc_read_time()
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/linux-6.12.1/drivers/tty/serial/
Dma35d1_serial.c1 // SPDX-License-Identifier: GPL-2.0+
3 * MA35D1 serial driver
8 #include <linux/clk.h>
36 /* MA35_IER_REG - Interrupt Enable Register */
40 #define MA35_IER_RTO_IEN BIT(4) /* RX Time-out Interrupt Enable */
42 #define MA35_IER_TIME_OUT_EN BIT(11) /* RX Buffer Time-out Counter Enable */
43 #define MA35_IER_AUTO_RTS BIT(12) /* nRTS Auto-flow Control Enable */
44 #define MA35_IER_AUTO_CTS BIT(13) /* nCTS Auto-flow Control Enable */
46 /* MA35_FCR_REG - FIFO Control Register */
62 /* MA35_LCR_REG - Line Control Register */
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/linux-6.12.1/drivers/mmc/host/
Dsdhci-of-ma35d1.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Author: Shan-Chun Hung <shanchun1218@gmail.com>
12 #include <linux/clk.h>
16 #include <linux/dma-mapping.h>
32 #include "sdhci-pltfm.h"
77 if (likely(!len || (ALIGN(addr, SZ_128M) == ALIGN(addr + len - 1, SZ_128M)))) { in ma35_adma_write_desc()
82 offset = addr & (SZ_128M - 1); in ma35_adma_write_desc()
83 tmplen = SZ_128M - offset; in ma35_adma_write_desc()
87 len -= tmplen; in ma35_adma_write_desc()
115 switch (ios->signal_voltage) { in ma35_start_signal_voltage_switch()
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/linux-6.12.1/
DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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