Searched +full:ls1021a +full:- +full:qspi (Results 1 – 14 of 14) sorted by relevance
/linux-6.12.1/Documentation/devicetree/bindings/spi/ |
D | fsl,spi-fsl-qspi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/spi/fsl,spi-fsl-qspi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Han Xu <han.xu@nxp.com> 13 - $ref: spi-controller.yaml# 18 - enum: 19 - fsl,vf610-qspi 20 - fsl,imx6sx-qspi 21 - fsl,imx7d-qspi [all …]
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/linux-6.12.1/arch/arm/boot/dts/nxp/ls/ |
D | ls1021a-tqmls1021a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR X11) 3 * Copyright 2013-2014 Freescale Semiconductor, Inc. 4 * Copyright 2018-2023 TQ-Systems GmbH <linux@ew.tq-group.com>, 5 * D-82229 Seefeld, Germany. 9 #include "ls1021a.dtsi" 13 compatible = "tq,ls1021a-tqmls1021a", "fsl,ls1021a"; 15 reg_3p3v_som: regulator-3p3v-som { 16 compatible = "regulator-fixed"; 17 regulator-name = "3P3V_SOM"; 18 regulator-min-microvolt = <3300000>; [all …]
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D | ls1021a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Copyright 2013-2014 Freescale Semiconductor, Inc. 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/thermal/thermal.h> 10 #address-cells = <2>; 11 #size-cells = <2>; 12 interrupt-parent = <&gic>; 30 #address-cells = <1>; 31 #size-cells = <0>; 34 compatible = "arm,cortex-a7"; [all …]
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D | ls1021a-iot.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright 2021-2022 NXP 7 /dts-v1/; 8 #include "ls1021a.dtsi" 11 model = "LS1021A-IOT Board"; 12 compatible = "fsl,ls1021a-iot", "fsl,ls1021a"; 14 sys_mclk: clock-mclk { 15 compatible = "fixed-clock"; 16 #clock-cells = <0>; 17 clock-frequency = <24576000>; [all …]
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D | ls1021a-twr.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Copyright 2013-2014 Freescale Semiconductor, Inc. 7 /dts-v1/; 8 #include "ls1021a.dtsi" 11 model = "LS1021A TWR Board"; 12 compatible = "fsl,ls1021a-twr", "fsl,ls1021a"; 20 sys_mclk: clock-mclk { 21 compatible = "fixed-clock"; 22 #clock-cells = <0>; 23 clock-frequency = <24576000>; [all …]
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D | ls1021a-tsn.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright 2016-2018 NXP Semiconductors 6 /dts-v1/; 7 #include "ls1021a.dtsi" 10 model = "NXP LS1021A-TSN Board"; 11 compatible = "fsl,ls1021a-tsn", "fsl,ls1021a"; 13 sys_mclk: clock-mclk { 14 compatible = "fixed-clock"; 15 #clock-cells = <0>; 16 clock-frequency = <24576000>; [all …]
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D | ls1021a-moxa-uc-8410a.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2017 Moxa Inc. - https://www.moxa.com/ 10 /dts-v1/; 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/input/input.h> 14 #include "ls1021a.dtsi" 17 model = "Moxa UC-8410A"; 18 compatible = "fsl,ls1021a-moxa-uc-8410a", "fsl,ls1021a"; 26 sys_mclk: clock-mclk { 27 compatible = "fixed-clock"; [all …]
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D | ls1021a-qds.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Copyright 2013-2014 Freescale Semiconductor, Inc. 7 /dts-v1/; 8 #include "ls1021a.dtsi" 11 model = "LS1021A QDS Board"; 12 compatible = "fsl,ls1021a-qds", "fsl,ls1021a"; 22 sys_mclk: clock-mclk { 23 compatible = "fixed-clock"; 24 #clock-cells = <0>; 25 clock-frequency = <24576000>; [all …]
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/linux-6.12.1/arch/arm64/boot/dts/freescale/ |
D | fsl-ls1043a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for NXP Layerscape-1043A family SoC. 5 * Copyright 2014-2015 Freescale Semiconductor, Inc. 11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 12 #include <dt-bindings/thermal/thermal.h> 13 #include <dt-bindings/interrupt-controller/arm-gic.h> 14 #include <dt-bindings/gpio/gpio.h> 18 interrupt-parent = <&gic>; 19 #address-cells = <2>; 20 #size-cells = <2>; [all …]
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D | fsl-ls1012a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for NXP Layerscape-1012A family SoC. 6 * Copyright 2019-2020 NXP 10 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/thermal/thermal.h> 16 interrupt-parent = <&gic>; 17 #address-cells = <2>; 18 #size-cells = <2>; 23 rtic-a = &rtic_a; [all …]
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D | fsl-ls1046a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for NXP Layerscape-1046A family SoC. 11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/thermal/thermal.h> 14 #include <dt-bindings/gpio/gpio.h> 18 interrupt-parent = <&gic>; 19 #address-cells = <2>; 20 #size-cells = <2>; 37 #address-cells = <1>; [all …]
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D | fsl-ls1088a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for NXP Layerscape-1088A family SoC. 5 * Copyright 2017-2020 NXP 10 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/thermal/thermal.h> 16 interrupt-parent = <&gic>; 17 #address-cells = <2>; 18 #size-cells = <2>; 26 #address-cells = <1>; [all …]
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/linux-6.12.1/drivers/spi/ |
D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 13 dynamic device discovery; some are even write-only or read-only. 17 chips, analog to digital (and d-to-a) converters, and more. 44 If your system has an master-capable SPI controller (which 56 by providing a high-level interface to send memory-like commands. 66 This enables support for SPI-NAND mode on the Airoha NAND 68 is implemented as a SPI-MEM controller. 155 supports spi-mem interface. 234 this code to manage the per-word or per-transfer accesses to the 263 Cadence QSPI is a specialized controller for connecting an SPI [all …]
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D | spi-fsl-qspi.c | 1 // SPDX-License-Identifier: GPL-2.0+ 18 * Based on the original fsl-quadspi.c SPI NOR driver: 42 #include <linux/spi/spi-mem.h> 158 #define LUT_PAD(x) (fls(x) - 1) 164 * --------------------------------------------------- 166 * --------------------------------------------------- 279 return q->devtype_data->quirks & QUADSPI_QUIRK_SWAP_ENDIAN; in needs_swap_endian() 284 return q->devtype_data->quirks & QUADSPI_QUIRK_4X_INT_CLK; in needs_4x_clock() 289 return q->devtype_data->quirks & QUADSPI_QUIRK_TKT253890; in needs_fill_txfifo() 294 return q->devtype_data->quirks & QUADSPI_QUIRK_TKT245618; in needs_wakeup_wait_mode() [all …]
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