Lines Matching +full:ls1021a +full:- +full:qspi
1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright 2021-2022 NXP
7 /dts-v1/;
8 #include "ls1021a.dtsi"
11 model = "LS1021A-IOT Board";
12 compatible = "fsl,ls1021a-iot", "fsl,ls1021a";
14 sys_mclk: clock-mclk {
15 compatible = "fixed-clock";
16 #clock-cells = <0>;
17 clock-frequency = <24576000>;
20 reg_3p3v: regulator-3V3 {
21 compatible = "regulator-fixed";
22 regulator-name = "3P3V";
23 regulator-min-microvolt = <3300000>;
24 regulator-max-microvolt = <3300000>;
25 regulator-always-on;
28 reg_2p5v: regulator-2V5 {
29 compatible = "regulator-fixed";
30 regulator-name = "2P5V";
31 regulator-min-microvolt = <2500000>;
32 regulator-max-microvolt = <2500000>;
33 regulator-always-on;
37 compatible = "simple-audio-card";
38 simple-audio-card,format = "i2s";
39 simple-audio-card,widgets =
44 simple-audio-card,routing =
51 simple-audio-card,cpu {
52 sound-dai = <&sai2>;
53 frame-master;
54 bitclock-master;
57 simple-audio-card,codec {
58 sound-dai = <&sgtl5000>;
59 frame-master;
60 bitclock-master;
86 bits-per-pixel = <24>;
88 display-timings {
89 native-mode = <&timing0>;
92 clock-frequency = <25000000>;
95 hback-porch = <80>;
96 hfront-porch = <80>;
97 vback-porch = <16>;
98 vfront-porch = <16>;
99 hsync-len = <12>;
100 vsync-len = <2>;
101 hsync-active = <1>;
102 vsync-active = <1>;
109 tbi-handle = <&tbi1>;
110 phy-handle = <&phy1>;
111 phy-connection-type = "sgmii";
116 tbi-handle = <&tbi1>;
117 phy-handle = <&phy3>;
118 phy-connection-type = "sgmii";
123 fixed-link = <0 1 1000 0 0>;
124 phy-connection-type = "rgmii-id";
138 gpio-controller;
139 #gpio-cells = <2>;
140 interrupt-controller;
141 #interrupt-cells = <2>;
144 sgtl5000: audio-codec@2a {
145 #sound-dai-cells = <0x0>;
148 VDDA-supply = <®_3p3v>;
149 VDDIO-supply = <®_2p5v>;
156 #io-channel-cells = <1>;
159 ina2201: core-monitor@44 {
162 shunt-resistor = <1000>;
165 ina2202: current-monitor@45 {
168 shunt-resistor = <1000>;
171 lm75b: thermal-monitor@48 {
182 phy0: ethernet-phy@0 {
186 phy1: ethernet-phy@1 {
190 phy2: ethernet-phy@2 {
194 phy3: ethernet-phy@3 {
198 tbi1: tbi-phy@1f {
200 device_type = "tbi-phy";
204 &qspi {
205 num-cs = <2>;
209 compatible = "jedec,spi-nor";
210 #address-cells = <1>;
211 #size-cells = <1>;
212 spi-max-frequency = <20000000>;