Searched +full:apq8064 +full:- +full:iommu (Results 1 – 6 of 6) sorted by relevance
/linux-6.12.1/Documentation/devicetree/bindings/iommu/ |
D | qcom,apq8064-iommu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $id: http://devicetree.org/schemas/iommu/qcom,apq8064-iommu.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: Qualcomm APQ8064 IOMMU 11 - David Heidelberg <david@ixit.cz> 14 The MSM IOMMU is an implementation compatible with the ARM VMSA short 16 outside of the CPU, each connected to the IOMMU through a port called micro-TLB. 20 const: qcom,apq8064-iommu 24 - description: interface clock for register accesses [all …]
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/linux-6.12.1/arch/arm/boot/dts/qcom/ |
D | qcom-apq8064.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/clock/qcom,gcc-msm8960.h> 5 #include <dt-bindings/clock/qcom,lcc-msm8960.h> 6 #include <dt-bindings/reset/qcom,gcc-msm8960.h> 7 #include <dt-bindings/clock/qcom,mmcc-msm8960.h> 8 #include <dt-bindings/clock/qcom,rpmcc.h> 9 #include <dt-bindings/soc/qcom,gsbi.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/pci/ |
D | qcom,pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <bjorn.andersson@linaro.org> 11 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> 20 - enum: 21 - qcom,pcie-apq8064 22 - qcom,pcie-apq8084 23 - qcom,pcie-ipq4019 24 - qcom,pcie-ipq6018 [all …]
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/linux-6.12.1/drivers/iommu/ |
D | msm_iommu.c | 1 // SPDX-License-Identifier: GPL-2.0-only 2 /* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. 13 #include <linux/io-pgtable.h> 18 #include <linux/iommu.h> 25 #include "msm_iommu_hw-8xxx.h" 54 static int __enable_clocks(struct msm_iommu_dev *iommu) in __enable_clocks() argument 58 ret = clk_enable(iommu->pclk); in __enable_clocks() 62 if (iommu->clk) { in __enable_clocks() 63 ret = clk_enable(iommu->clk); in __enable_clocks() 65 clk_disable(iommu->pclk); in __enable_clocks() [all …]
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/linux-6.12.1/drivers/gpu/drm/msm/disp/mdp4/ |
D | mdp4_kms.c | 1 // SPDX-License-Identifier: GPL-2.0-only 19 struct drm_device *dev = mdp4_kms->dev; in mdp4_hw_init() 23 pm_runtime_get_sync(dev->dev); in mdp4_hw_init() 25 if (mdp4_kms->rev > 1) { in mdp4_hw_init() 35 clk = clk_get_rate(mdp4_kms->clk); in mdp4_hw_init() 37 if ((mdp4_kms->rev >= 1) || (clk >= 90000000)) { in mdp4_hw_init() 38 dmap_cfg = 0x47; /* 16 bytes-burst x 8 req */ in mdp4_hw_init() 39 vg_cfg = 0x47; /* 16 bytes-burs x 8 req */ in mdp4_hw_init() 41 dmap_cfg = 0x27; /* 8 bytes-burst x 8 req */ in mdp4_hw_init() 42 vg_cfg = 0x43; /* 16 bytes-burst x 4 req */ in mdp4_hw_init() [all …]
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/linux-6.12.1/drivers/pci/controller/dwc/ |
D | pcie-qcom.c | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (c) 2014-2015, The Linux Foundation. All rights reserved. 8 * Author: Stanimir Varbanov <svarbanov@mm-sol.com> 37 #include "pcie-designware.h" 38 #include "pcie-qcom-common.h" 253 * struct qcom_pcie_cfg - Per SoC config struct 280 #define to_qcom_pcie(x) dev_get_drvdata((x)->dev) 284 gpiod_set_value_cansleep(pcie->reset, 1); in qcom_ep_reset_assert() 292 gpiod_set_value_cansleep(pcie->reset, 0); in qcom_ep_reset_deassert() 300 if (pcie_link_speed[pci->max_link_speed] == PCIE_SPEED_16_0GT) { in qcom_pcie_start_link() [all …]
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