bindings/iommu/qcom%2Capq8064-iommu.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $id: http://devicetree.org/schemas/iommu/qcom,apq8064-iommu.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Qualcomm APQ8064 IOMMU
11   - David Heidelberg <david@ixit.cz>
14   The MSM IOMMU is an implementation compatible with the ARM VMSA short
16   outside of the CPU, each connected to the IOMMU through a port called micro-TLB.
20     const: qcom,apq8064-iommu
24       - description: interface clock for register accesses
25       - description: functional clock for bus accesses
27   clock-names:
29       - const: smmu_pclk
30       - const: iommu_clk
39       - description: non-secure mode interrupt
40       - description: secure mode interrupt (for instances which supports it)
42   "#iommu-cells":
44     description: Each IOMMU specifier describes a single Stream ID.
48     description: The total number of context banks in the IOMMU.
53   - reg
54   - interrupts
55   - clocks
56   - clock-names
57   - qcom,ncb
62   - |
63     #include <dt-bindings/clock/qcom,mmcc-msm8960.h>
64     #include <dt-bindings/interrupt-controller/irq.h>
65     #include <dt-bindings/interrupt-controller/arm-gic.h>
67     iommu@7500000 {
68             compatible = "qcom,apq8064-iommu";
74             clock-names = "smmu_pclk",
76             #iommu-cells = <1>;