Searched refs:SOC_LF_TIMER_CONTROL0_ENABLE_MASK (Results 1 – 7 of 7) sorted by relevance
84 #define SOC_LF_TIMER_CONTROL0_ENABLE_MASK ATH_UNSUPPORTED_REG_OFFSET macro297 = SOC_LF_TIMER_CONTROL0_ENABLE_MASK,
169 #define SOC_LF_TIMER_CONTROL0_ENABLE_MASK \ macro
171 #define SOC_LF_TIMER_CONTROL0_ENABLE_MASK \ macro
381 #define SOC_LF_TIMER_CONTROL0_ENABLE_MASK 0x00000004 macro382 #define SOC_LF_TIMER_CONTROL0_ENABLE_GET(x) (((x) & SOC_LF_TIMER_CONTROL0_ENABLE_MASK) >> SOC_…383 …_ENABLE_SET(x) (((x) << SOC_LF_TIMER_CONTROL0_ENABLE_LSB) & SOC_LF_TIMER_CONTROL0_ENABLE_MASK)
363 #define SOC_LF_TIMER_CONTROL0_ENABLE_MASK \ macro
457 #define SOC_LF_TIMER_CONTROL0_ENABLE_MASK \ macro
666 val &= ~SOC_LF_TIMER_CONTROL0_ENABLE_MASK; in hif_pci_device_warm_reset()