Searched refs:signal_levels (Results 1 – 2 of 2) sorted by relevance
1000 u32 signal_levels = 0; in g4x_signal_levels() local1005 signal_levels |= DP_VOLTAGE_0_4; in g4x_signal_levels()1008 signal_levels |= DP_VOLTAGE_0_6; in g4x_signal_levels()1011 signal_levels |= DP_VOLTAGE_0_8; in g4x_signal_levels()1014 signal_levels |= DP_VOLTAGE_1_2; in g4x_signal_levels()1020 signal_levels |= DP_PRE_EMPHASIS_0; in g4x_signal_levels()1023 signal_levels |= DP_PRE_EMPHASIS_3_5; in g4x_signal_levels()1026 signal_levels |= DP_PRE_EMPHASIS_6; in g4x_signal_levels()1029 signal_levels |= DP_PRE_EMPHASIS_9_5; in g4x_signal_levels()1032 return signal_levels; in g4x_signal_levels()[all …]
1401 u8 signal_levels) in translate_signal_level() argument1407 if (index_to_dp_signal_levels[i] == signal_levels) in translate_signal_level()1413 signal_levels); in translate_signal_level()1427 u8 signal_levels = train_set & (DP_TRAIN_VOLTAGE_SWING_MASK | in intel_ddi_dp_level() local1430 return translate_signal_level(intel_dp, signal_levels); in intel_ddi_dp_level()1466 u32 signal_levels; in hsw_set_signal_levels() local1475 signal_levels = DDI_BUF_TRANS_SELECT(level); in hsw_set_signal_levels()1478 signal_levels); in hsw_set_signal_levels()1481 intel_dp->DP |= signal_levels; in hsw_set_signal_levels()