1000 	u32 signal_levels = 0;  in g4x_signal_levels()  local
1005 		signal_levels |= DP_VOLTAGE_0_4;  in g4x_signal_levels()
1008 		signal_levels |= DP_VOLTAGE_0_6;  in g4x_signal_levels()
1011 		signal_levels |= DP_VOLTAGE_0_8;  in g4x_signal_levels()
1014 		signal_levels |= DP_VOLTAGE_1_2;  in g4x_signal_levels()
1020 		signal_levels |= DP_PRE_EMPHASIS_0;  in g4x_signal_levels()
1023 		signal_levels |= DP_PRE_EMPHASIS_3_5;  in g4x_signal_levels()
1026 		signal_levels |= DP_PRE_EMPHASIS_6;  in g4x_signal_levels()
1029 		signal_levels |= DP_PRE_EMPHASIS_9_5;  in g4x_signal_levels()
1032 	return signal_levels;  in g4x_signal_levels()
1042 	u32 signal_levels;  in g4x_set_signal_levels()  local
1044 	signal_levels = g4x_signal_levels(train_set);  in g4x_set_signal_levels()
1047 		    signal_levels);  in g4x_set_signal_levels()
1050 	intel_dp->DP |= signal_levels;  in g4x_set_signal_levels()
1059 	u8 signal_levels = train_set & (DP_TRAIN_VOLTAGE_SWING_MASK |  in snb_cpu_edp_signal_levels()  local
1062 	switch (signal_levels) {  in snb_cpu_edp_signal_levels()
1078 		MISSING_CASE(signal_levels);  in snb_cpu_edp_signal_levels()
1090 	u32 signal_levels;  in snb_cpu_edp_set_signal_levels()  local
1092 	signal_levels = snb_cpu_edp_signal_levels(train_set);  in snb_cpu_edp_set_signal_levels()
1095 		    signal_levels);  in snb_cpu_edp_set_signal_levels()
1098 	intel_dp->DP |= signal_levels;  in snb_cpu_edp_set_signal_levels()
1107 	u8 signal_levels = train_set & (DP_TRAIN_VOLTAGE_SWING_MASK |  in ivb_cpu_edp_signal_levels()  local
1110 	switch (signal_levels) {  in ivb_cpu_edp_signal_levels()
1130 		MISSING_CASE(signal_levels);  in ivb_cpu_edp_signal_levels()
1142 	u32 signal_levels;  in ivb_cpu_edp_set_signal_levels()  local
1144 	signal_levels = ivb_cpu_edp_signal_levels(train_set);  in ivb_cpu_edp_set_signal_levels()
1147 		    signal_levels);  in ivb_cpu_edp_set_signal_levels()
1150 	intel_dp->DP |= signal_levels;  in ivb_cpu_edp_set_signal_levels()