Searched refs:set_wptr (Results 1 – 25 of 49) sorted by relevance
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| /linux-6.12.1/drivers/gpu/drm/radeon/ |
| D | radeon_asic.c | 194 .set_wptr = &r100_gfx_set_wptr,
344 .set_wptr = &r100_gfx_set_wptr,
358 .set_wptr = &r100_gfx_set_wptr,
915 .set_wptr = &r600_gfx_set_wptr,
928 .set_wptr = &r600_dma_set_wptr,
1013 .set_wptr = &uvd_v1_0_set_wptr,
1212 .set_wptr = &uvd_v1_0_set_wptr,
1319 .set_wptr = &r600_gfx_set_wptr,
1332 .set_wptr = &r600_dma_set_wptr,
1629 .set_wptr = &cayman_gfx_set_wptr,
[all …]
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| /linux-6.12.1/drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_ring.h | 177 void (*set_wptr)(struct amdgpu_ring *ring); member
318 #define amdgpu_ring_set_wptr(r) (r)->funcs->set_wptr((r))
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| D | jpeg_v2_5.c | 664 .set_wptr = jpeg_v2_5_dec_ring_set_wptr,
694 .set_wptr = jpeg_v2_5_dec_ring_set_wptr,
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| D | vce_v3_0.c | 928 .set_wptr = vce_v3_0_ring_set_wptr,
952 .set_wptr = vce_v3_0_ring_set_wptr,
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| D | uvd_v6_0.c | 1559 .set_wptr = uvd_v6_0_ring_set_wptr,
1585 .set_wptr = uvd_v6_0_ring_set_wptr,
1614 .set_wptr = uvd_v6_0_enc_ring_set_wptr,
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| D | jpeg_v3_0.c | 562 .set_wptr = jpeg_v3_0_dec_ring_set_wptr,
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| D | vce_v2_0.c | 641 .set_wptr = vce_v2_0_ring_set_wptr,
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| D | jpeg_v5_0_0.c | 649 .set_wptr = jpeg_v5_0_0_dec_ring_set_wptr,
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| D | uvd_v3_1.c | 186 .set_wptr = uvd_v3_1_ring_set_wptr,
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| D | uvd_v4_2.c | 783 .set_wptr = uvd_v4_2_ring_set_wptr,
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| D | jpeg_v4_0.c | 729 .set_wptr = jpeg_v4_0_dec_ring_set_wptr,
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| D | uvd_v5_0.c | 891 .set_wptr = uvd_v5_0_ring_set_wptr,
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| D | jpeg_v1_0.c | 563 .set_wptr = jpeg_v1_0_decode_ring_set_wptr,
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| D | jpeg_v4_0_5.c | 770 .set_wptr = jpeg_v4_0_5_dec_ring_set_wptr,
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| D | jpeg_v2_0.c | 771 .set_wptr = jpeg_v2_0_dec_ring_set_wptr,
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| D | vcn_v3_0.c | 1790 .set_wptr = vcn_v3_0_dec_ring_set_wptr,
1950 .set_wptr = vcn_v3_0_dec_ring_set_wptr,
2050 .set_wptr = vcn_v3_0_enc_ring_set_wptr,
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| D | si_dma.c | 722 .set_wptr = si_dma_ring_set_wptr,
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| D | uvd_v7_0.c | 1813 .set_wptr = uvd_v7_0_ring_set_wptr,
1845 .set_wptr = uvd_v7_0_enc_ring_set_wptr,
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| D | amdgpu_vpe.c | 877 .set_wptr = vpe_ring_set_wptr,
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| D | vcn_v1_0.c | 2087 .set_wptr = vcn_v1_0_dec_ring_set_wptr,
2121 .set_wptr = vcn_v1_0_enc_ring_set_wptr,
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| D | vcn_v2_0.c | 2125 .set_wptr = vcn_v2_0_dec_ring_set_wptr,
2155 .set_wptr = vcn_v2_0_enc_ring_set_wptr,
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| D | sdma_v4_4_2.c | 1929 .set_wptr = sdma_v4_4_2_ring_set_wptr,
1960 .set_wptr = sdma_v4_4_2_page_ring_set_wptr,
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| D | amdgpu_umsch_mm.c | 555 .set_wptr = umsch_mm_ring_set_wptr,
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| D | vcn_v2_5.c | 1627 .set_wptr = vcn_v2_5_dec_ring_set_wptr,
1726 .set_wptr = vcn_v2_5_enc_ring_set_wptr,
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| D | sdma_v2_4.c | 1129 .set_wptr = sdma_v2_4_ring_set_wptr,
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