| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dpp/dcn401/ |
| D | dcn401_dpp_dscl.c | 282 const struct scaler_data *scl_data, in dpp401_dscl_set_scl_filter() argument
290 uint32_t h_2tap_sharp_factor = scl_data->sharpness.horz; in dpp401_dscl_set_scl_filter()
291 uint32_t v_2tap_sharp_factor = scl_data->sharpness.vert; in dpp401_dscl_set_scl_filter()
299 filter_h = scl_data->dscl_prog_data.filter_h; in dpp401_dscl_set_scl_filter()
300 filter_v = scl_data->dscl_prog_data.filter_v; in dpp401_dscl_set_scl_filter()
302 filter_h_c = scl_data->dscl_prog_data.filter_h_c; in dpp401_dscl_set_scl_filter()
303 filter_v_c = scl_data->dscl_prog_data.filter_v_c; in dpp401_dscl_set_scl_filter()
307 scl_data->taps.h_taps, scl_data->ratios.horz); in dpp401_dscl_set_scl_filter()
309 scl_data->taps.v_taps, scl_data->ratios.vert); in dpp401_dscl_set_scl_filter()
312 scl_data->taps.h_taps_c, scl_data->ratios.horz_c); in dpp401_dscl_set_scl_filter()
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| D | dcn401_dpp.c | 284 const struct scaler_data *scl_data, in dscl401_calc_lb_num_partitions() argument
292 int line_size = scl_data->viewport.width < scl_data->recout.width ? in dscl401_calc_lb_num_partitions()
293 scl_data->viewport.width : scl_data->recout.width; in dscl401_calc_lb_num_partitions()
294 int line_size_c = scl_data->viewport_c.width < scl_data->recout.width ? in dscl401_calc_lb_num_partitions()
295 scl_data->viewport_c.width : scl_data->recout.width; in dscl401_calc_lb_num_partitions()
316 if (scl_data->viewport.width == scl_data->h_active && in dscl401_calc_lb_num_partitions()
317 scl_data->viewport.height == scl_data->v_active) { in dscl401_calc_lb_num_partitions()
330 if (scl_data->viewport.width == scl_data->h_active && in dscl401_calc_lb_num_partitions()
331 scl_data->viewport.height == scl_data->v_active) { in dscl401_calc_lb_num_partitions()
346 if (scl_data->lb_params.alpha_en in dscl401_calc_lb_num_partitions()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/spl/ |
| D | dc_spl.c | 345 spl_scratch->scl_data.recout = shift_rec( in spl_calculate_recout()
348 spl_scratch->scl_data.recout.height -= in spl_calculate_recout()
350 spl_scratch->scl_data.recout.height -= in spl_calculate_recout()
354 memset(&spl_scratch->scl_data.recout, 0, in spl_calculate_recout()
374 spl_scratch->scl_data.ratios.horz = spl_fixpt_from_fraction( in spl_calculate_scaling_ratios()
377 spl_scratch->scl_data.ratios.vert = spl_fixpt_from_fraction( in spl_calculate_scaling_ratios()
382 spl_scratch->scl_data.ratios.horz.value *= 2; in spl_calculate_scaling_ratios()
384 spl_scratch->scl_data.ratios.vert.value *= 2; in spl_calculate_scaling_ratios()
386 spl_scratch->scl_data.ratios.vert.value = spl_div64_s64( in spl_calculate_scaling_ratios()
387 spl_scratch->scl_data.ratios.vert.value * in_h, out_h); in spl_calculate_scaling_ratios()
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| D | dc_spl_types.h | 417 struct spl_scaler_data scl_data; member
504 const struct spl_scaler_data *scl_data,
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dpp/dcn32/ |
| D | dcn32_dpp.c | 35 const struct scaler_data *scl_data, in dscl32_calc_lb_num_partitions() argument
43 int line_size = scl_data->viewport.width < scl_data->recout.width ? in dscl32_calc_lb_num_partitions()
44 scl_data->viewport.width : scl_data->recout.width; in dscl32_calc_lb_num_partitions()
45 int line_size_c = scl_data->viewport_c.width < scl_data->recout.width ? in dscl32_calc_lb_num_partitions()
46 scl_data->viewport_c.width : scl_data->recout.width; in dscl32_calc_lb_num_partitions()
67 if (scl_data->viewport.width == scl_data->h_active && in dscl32_calc_lb_num_partitions()
68 scl_data->viewport.height == scl_data->v_active) { in dscl32_calc_lb_num_partitions()
81 if (scl_data->viewport.width == scl_data->h_active && in dscl32_calc_lb_num_partitions()
82 scl_data->viewport.height == scl_data->v_active) { in dscl32_calc_lb_num_partitions()
97 if (scl_data->lb_params.alpha_en in dscl32_calc_lb_num_partitions()
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| D | dcn32_dpp.h | 41 const struct spl_scaler_data *scl_data,
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dpp/dcn201/ |
| D | dcn201_dpp.c | 192 struct scaler_data *scl_data, in dpp201_get_optimal_number_of_taps() argument
196 if (scl_data->viewport.width != scl_data->h_active && in dpp201_get_optimal_number_of_taps()
197 scl_data->viewport.height != scl_data->v_active && in dpp201_get_optimal_number_of_taps()
199 scl_data->format == PIXEL_FORMAT_FP16) in dpp201_get_optimal_number_of_taps()
202 if (scl_data->viewport.width > scl_data->h_active && in dpp201_get_optimal_number_of_taps()
204 scl_data->viewport.width > dpp->ctx->dc->debug.max_downscale_src_width) in dpp201_get_optimal_number_of_taps()
208 if (scl_data->ratios.horz.value == (8ll << 32)) in dpp201_get_optimal_number_of_taps()
209 scl_data->ratios.horz.value--; in dpp201_get_optimal_number_of_taps()
210 if (scl_data->ratios.vert.value == (8ll << 32)) in dpp201_get_optimal_number_of_taps()
211 scl_data->ratios.vert.value--; in dpp201_get_optimal_number_of_taps()
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| D | dcn201_dpp.h | 72 struct scaler_data scl_data; member
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dpp/dcn10/ |
| D | dcn10_dpp_dscl.c | 280 const struct scaler_data *scl_data, in dpp1_dscl_set_scl_filter() argument
287 uint32_t h_2tap_sharp_factor = scl_data->sharpness.horz; in dpp1_dscl_set_scl_filter()
288 uint32_t v_2tap_sharp_factor = scl_data->sharpness.vert; in dpp1_dscl_set_scl_filter()
295 h_2tap_hardcode_coef_en = scl_data->taps.h_taps < 3 in dpp1_dscl_set_scl_filter()
296 && scl_data->taps.h_taps_c < 3 in dpp1_dscl_set_scl_filter()
297 && (scl_data->taps.h_taps > 1 && scl_data->taps.h_taps_c > 1); in dpp1_dscl_set_scl_filter()
298 v_2tap_hardcode_coef_en = scl_data->taps.v_taps < 3 in dpp1_dscl_set_scl_filter()
299 && scl_data->taps.v_taps_c < 3 in dpp1_dscl_set_scl_filter()
300 && (scl_data->taps.v_taps > 1 && scl_data->taps.v_taps_c > 1); in dpp1_dscl_set_scl_filter()
317 scl_data->taps.h_taps, scl_data->ratios.horz); in dpp1_dscl_set_scl_filter()
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| D | dcn10_dpp.c | 126 struct scaler_data *scl_data, in dpp1_get_optimal_number_of_taps() argument
130 if (scl_data->format == PIXEL_FORMAT_FP16 && in dpp1_get_optimal_number_of_taps()
132 scl_data->ratios.horz.value != dc_fixpt_one.value && in dpp1_get_optimal_number_of_taps()
133 scl_data->ratios.vert.value != dc_fixpt_one.value) in dpp1_get_optimal_number_of_taps()
136 if (scl_data->viewport.width > scl_data->h_active && in dpp1_get_optimal_number_of_taps()
138 scl_data->viewport.width > dpp->ctx->dc->debug.max_downscale_src_width) in dpp1_get_optimal_number_of_taps()
144 if (scl_data->ratios.horz.value == (4ll << 32)) in dpp1_get_optimal_number_of_taps()
145 scl_data->ratios.horz.value--; in dpp1_get_optimal_number_of_taps()
146 if (scl_data->ratios.vert.value == (4ll << 32)) in dpp1_get_optimal_number_of_taps()
147 scl_data->ratios.vert.value--; in dpp1_get_optimal_number_of_taps()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dpp/dcn20/ |
| D | dcn20_dpp.c | 261 const struct scaler_data *scl_data, in dscl2_calc_lb_num_partitions() argument
269 int line_size = scl_data->viewport.width < scl_data->recout.width ? in dscl2_calc_lb_num_partitions()
270 scl_data->viewport.width : scl_data->recout.width; in dscl2_calc_lb_num_partitions()
271 int line_size_c = scl_data->viewport_c.width < scl_data->recout.width ? in dscl2_calc_lb_num_partitions()
272 scl_data->viewport_c.width : scl_data->recout.width; in dscl2_calc_lb_num_partitions()
306 if (scl_data->lb_params.alpha_en in dscl2_calc_lb_num_partitions()
438 const struct spl_scaler_data *scl_data, in dscl2_spl_calc_lb_num_partitions() argument
446 int line_size = scl_data->viewport.width < scl_data->recout.width ? in dscl2_spl_calc_lb_num_partitions()
447 scl_data->viewport.width : scl_data->recout.width; in dscl2_spl_calc_lb_num_partitions()
448 int line_size_c = scl_data->viewport_c.width < scl_data->recout.width ? in dscl2_spl_calc_lb_num_partitions()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dpp/dcn30/ |
| D | dcn30_dpp.c | 420 struct scaler_data *scl_data, in dpp3_get_optimal_number_of_taps() argument
428 if (scl_data->viewport.width > scl_data->h_active && in dpp3_get_optimal_number_of_taps()
430 scl_data->viewport.width > dpp->ctx->dc->debug.max_downscale_src_width) in dpp3_get_optimal_number_of_taps()
439 if (dc_fixpt_ceil(scl_data->ratios.horz) > 1) in dpp3_get_optimal_number_of_taps()
440 scl_data->taps.h_taps = min(2 * dc_fixpt_ceil(scl_data->ratios.horz), 8); in dpp3_get_optimal_number_of_taps()
442 scl_data->taps.h_taps = 4; in dpp3_get_optimal_number_of_taps()
444 scl_data->taps.h_taps = in_taps->h_taps; in dpp3_get_optimal_number_of_taps()
446 if (dc_fixpt_ceil(scl_data->ratios.vert) > 1) in dpp3_get_optimal_number_of_taps()
447 scl_data->taps.v_taps = min(dc_fixpt_ceil(dc_fixpt_mul_int(scl_data->ratios.vert, 2)), 8); in dpp3_get_optimal_number_of_taps()
449 scl_data->taps.v_taps = 4; in dpp3_get_optimal_number_of_taps()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dce60/ |
| D | dce60_hw_sequencer.c | 151 default_adjust.surface_pixel_format = pipe_ctx->plane_res.scl_data.format; in dce60_set_default_colors()
158 default_adjust.lb_color_depth = pipe_ctx->plane_res.scl_data.lb_params.depth; in dce60_set_default_colors()
202 switch (pipe_ctx->plane_res.scl_data.format) { in dce60_get_surface_visual_confirm_color()
248 pipe_ctx->plane_res.scl_data.lb_params.depth, in dce60_program_scaler()
266 &pipe_ctx->plane_res.scl_data); in dce60_program_scaler()
312 pipe_ctx->plane_res.scl_data.lb_params.alpha_en = pipe_ctx->bottom_pipe != 0; in dce60_program_front_end_for_pipe()
371 pipe_ctx->plane_res.scl_data.viewport.width, in dce60_program_front_end_for_pipe()
372 pipe_ctx->plane_res.scl_data.viewport.height, in dce60_program_front_end_for_pipe()
373 pipe_ctx->plane_res.scl_data.viewport.x, in dce60_program_front_end_for_pipe()
374 pipe_ctx->plane_res.scl_data.viewport.y, in dce60_program_front_end_for_pipe()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/ |
| D | dc_spl_translate.c | 91 spl_in->basic_in.format = (enum spl_pixel_format)pipe_ctx->plane_res.scl_data.format; in translate_SPL_in_params_from_pipe_ctx()
130 spl_in->basic_out.alpha_en = pipe_ctx->plane_res.scl_data.lb_params.alpha_en; in translate_SPL_in_params_from_pipe_ctx()
187 spl_in->h_active = pipe_ctx->plane_res.scl_data.h_active; in translate_SPL_in_params_from_pipe_ctx()
188 spl_in->v_active = pipe_ctx->plane_res.scl_data.v_active; in translate_SPL_in_params_from_pipe_ctx()
208 populate_rect_from_splrect(&pipe_ctx->plane_res.scl_data.recout, &spl_out->dscl_prog_data->recout); in translate_SPL_out_params_to_pipe_ctx()
210 …populate_ratios_from_splratios(&pipe_ctx->plane_res.scl_data.ratios, &spl_out->dscl_prog_data->rat… in translate_SPL_out_params_to_pipe_ctx()
212 …populate_rect_from_splrect(&pipe_ctx->plane_res.scl_data.viewport, &spl_out->dscl_prog_data->viewp… in translate_SPL_out_params_to_pipe_ctx()
214 …populate_rect_from_splrect(&pipe_ctx->plane_res.scl_data.viewport_c, &spl_out->dscl_prog_data->vie… in translate_SPL_out_params_to_pipe_ctx()
216 populate_taps_from_spltaps(&pipe_ctx->plane_res.scl_data.taps, &spl_out->dscl_prog_data->taps); in translate_SPL_out_params_to_pipe_ctx()
218 populate_inits_from_splinits(&pipe_ctx->plane_res.scl_data.inits, &spl_out->dscl_prog_data->init); in translate_SPL_out_params_to_pipe_ctx()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dce/ |
| D | dce_transform.c | 1165 struct scaler_data *scl_data, in dce_transform_get_optimal_number_of_taps() argument
1169 int pixel_width = scl_data->viewport.width; in dce_transform_get_optimal_number_of_taps()
1173 (scl_data->viewport.width > scl_data->recout.width)) in dce_transform_get_optimal_number_of_taps()
1174 pixel_width = scl_data->recout.width; in dce_transform_get_optimal_number_of_taps()
1178 scl_data->lb_params.depth, in dce_transform_get_optimal_number_of_taps()
1194 scl_data->taps.h_taps = decide_taps(scl_data->ratios.horz, in_taps->h_taps, false); in dce_transform_get_optimal_number_of_taps()
1195 scl_data->taps.v_taps = decide_taps(scl_data->ratios.vert, in_taps->v_taps, false); in dce_transform_get_optimal_number_of_taps()
1196 scl_data->taps.h_taps_c = decide_taps(scl_data->ratios.horz_c, in_taps->h_taps, true); in dce_transform_get_optimal_number_of_taps()
1197 scl_data->taps.v_taps_c = decide_taps(scl_data->ratios.vert_c, in_taps->v_taps, true); in dce_transform_get_optimal_number_of_taps()
1199 if (!IDENTITY_RATIO(scl_data->ratios.vert)) { in dce_transform_get_optimal_number_of_taps()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/calcs/ |
| D | dcn_calcs.c | 341 input->src.viewport_width = pipe->plane_res.scl_data.viewport.width; in pipe_ctx_to_e2e_pipe_params()
342 input->src.viewport_height = pipe->plane_res.scl_data.viewport.height; in pipe_ctx_to_e2e_pipe_params()
343 input->src.data_pitch = pipe->plane_res.scl_data.viewport.width; in pipe_ctx_to_e2e_pipe_params()
344 input->src.data_pitch_c = pipe->plane_res.scl_data.viewport.width; in pipe_ctx_to_e2e_pipe_params()
398 input->scale_taps.htaps = pipe->plane_res.scl_data.taps.h_taps; in pipe_ctx_to_e2e_pipe_params()
399 input->scale_ratio_depth.hscl_ratio = pipe->plane_res.scl_data.ratios.horz.value/4294967296.0; in pipe_ctx_to_e2e_pipe_params()
400 input->scale_ratio_depth.vscl_ratio = pipe->plane_res.scl_data.ratios.vert.value/4294967296.0; in pipe_ctx_to_e2e_pipe_params()
401 input->scale_ratio_depth.vinit = pipe->plane_res.scl_data.inits.v.value/4294967296.0; in pipe_ctx_to_e2e_pipe_params()
404 input->scale_taps.vtaps = pipe->plane_res.scl_data.taps.v_taps; in pipe_ctx_to_e2e_pipe_params()
405 input->scale_taps.vtaps_c = pipe->plane_res.scl_data.taps.v_taps_c; in pipe_ctx_to_e2e_pipe_params()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dce110/ |
| D | dce110_transform_v.c | 48 const struct scaler_data *scl_data, in calculate_viewport() argument
53 luma_viewport->x = scl_data->viewport.x - scl_data->viewport.x % 2; in calculate_viewport()
54 luma_viewport->y = scl_data->viewport.y - scl_data->viewport.y % 2; in calculate_viewport()
56 scl_data->viewport.width - scl_data->viewport.width % 2; in calculate_viewport()
58 scl_data->viewport.height - scl_data->viewport.height % 2; in calculate_viewport()
64 if (scl_data->format == PIXEL_FORMAT_420BPP8) { in calculate_viewport()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/core/ |
| D | dc_resource.c | 774 struct scaler_data *data = &pipe_ctx->plane_res.scl_data; in calculate_viewport_size()
1121 pipe_ctx->plane_res.scl_data.recout = shift_rec( in calculate_recout()
1125 &pipe_ctx->plane_res.scl_data.recout, in calculate_recout()
1129 memset(&pipe_ctx->plane_res.scl_data.recout, 0, in calculate_recout()
1150 pipe_ctx->plane_res.scl_data.ratios.horz = dc_fixpt_from_fraction( in calculate_scaling_ratios()
1153 pipe_ctx->plane_res.scl_data.ratios.vert = dc_fixpt_from_fraction( in calculate_scaling_ratios()
1158 pipe_ctx->plane_res.scl_data.ratios.horz.value *= 2; in calculate_scaling_ratios()
1160 pipe_ctx->plane_res.scl_data.ratios.vert.value *= 2; in calculate_scaling_ratios()
1162 pipe_ctx->plane_res.scl_data.ratios.vert.value = div64_s64( in calculate_scaling_ratios()
1163 pipe_ctx->plane_res.scl_data.ratios.vert.value * in_h, out_h); in calculate_scaling_ratios()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| D | transform.h | 173 const struct scaler_data *scl_data);
182 struct scaler_data *scl_data,
286 const struct scaler_data *scl_data,
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| D | dpp.h | 227 const struct scaler_data *scl_data);
236 struct scaler_data *scl_data,
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| /linux-6.12.1/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| D | amdgpu_dm_trace.h | 439 __entry->recout_x = plane_res->scl_data.recout.x;
440 __entry->recout_y = plane_res->scl_data.recout.y;
441 __entry->recout_w = plane_res->scl_data.recout.width;
442 __entry->recout_h = plane_res->scl_data.recout.height;
443 __entry->viewport_x = plane_res->scl_data.viewport.x;
444 __entry->viewport_y = plane_res->scl_data.viewport.y;
445 __entry->viewport_w = plane_res->scl_data.viewport.width;
446 __entry->viewport_h = plane_res->scl_data.viewport.height;
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dcn10/ |
| D | dcn10_hwseq.c | 2758 pipe_ctx->plane_res.scl_data.lb_params.alpha_en = per_pixel_alpha; in update_scaler()
2759 pipe_ctx->plane_res.scl_data.lb_params.depth = LB_PIXEL_DEPTH_36BPP; in update_scaler()
2762 pipe_ctx->plane_res.dpp, &pipe_ctx->plane_res.scl_data); in update_scaler()
2852 size.surface_size = pipe_ctx->plane_res.scl_data.viewport; in dcn10_update_dchubp_dpp()
2876 &pipe_ctx->plane_res.scl_data.viewport, in dcn10_update_dchubp_dpp()
2877 &pipe_ctx->plane_res.scl_data.viewport_c); in dcn10_update_dchubp_dpp()
3435 const struct scaler_data *scl_data = &pipe_ctx->plane_res.scl_data; in dcn10_can_pipe_disable_cursor() local
3436 struct rect r1 = scl_data->recout, r2, r2_half; in dcn10_can_pipe_disable_cursor()
3453 r2 = test_pipe->plane_res.scl_data.recout; in dcn10_can_pipe_disable_cursor()
3465 r2_half = split_pipe->plane_res.scl_data.recout; in dcn10_can_pipe_disable_cursor()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml2/dml21/ |
| D | dml21_translation_helper.c | 710 temp_pipe->plane_res.scl_data.taps = pipe->plane_res.scl_data.taps; in get_scaler_data_for_plane()
718 return &temp_pipe->plane_res.scl_data; in get_scaler_data_for_plane()
1147 pipe_ctx->pipe_dlg_param.recout_height = pipe_ctx->plane_res.scl_data.recout.height; in dml21_populate_pipe_ctx_dlg_params()
1148 pipe_ctx->pipe_dlg_param.recout_width = pipe_ctx->plane_res.scl_data.recout.width; in dml21_populate_pipe_ctx_dlg_params()
1149 pipe_ctx->pipe_dlg_param.full_recout_height = pipe_ctx->plane_res.scl_data.recout.height; in dml21_populate_pipe_ctx_dlg_params()
1150 pipe_ctx->pipe_dlg_param.full_recout_width = pipe_ctx->plane_res.scl_data.recout.width; in dml21_populate_pipe_ctx_dlg_params()
1172 mcache_pipe_config->plane0.viewport_x_start = pipe_ctx->plane_res.scl_data.viewport.x; in dml21_get_pipe_mcache_config()
1173 mcache_pipe_config->plane0.viewport_width = pipe_ctx->plane_res.scl_data.viewport.width; in dml21_get_pipe_mcache_config()
1175 mcache_pipe_config->plane1.viewport_x_start = pipe_ctx->plane_res.scl_data.viewport_c.x; in dml21_get_pipe_mcache_config()
1176 mcache_pipe_config->plane1.viewport_width = pipe_ctx->plane_res.scl_data.viewport_c.width; in dml21_get_pipe_mcache_config()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dcn401/ |
| D | dcn401_hwseq.c | 1045 const struct scaler_data *scl_data = &pipe_ctx->plane_res.scl_data; in dcn401_can_pipe_disable_cursor() local
1046 struct rect r1 = scl_data->recout, r2, r2_half; in dcn401_can_pipe_disable_cursor()
1063 r2 = test_pipe->plane_res.scl_data.recout; in dcn401_can_pipe_disable_cursor()
1075 r2_half = split_pipe->plane_res.scl_data.recout; in dcn401_can_pipe_disable_cursor()
1108 .viewport = pipe_ctx->plane_res.scl_data.viewport, in dcn401_set_cursor_position()
1109 .recout = pipe_ctx->plane_res.scl_data.recout, in dcn401_set_cursor_position()
1110 .h_scale_ratio = pipe_ctx->plane_res.scl_data.ratios.horz, in dcn401_set_cursor_position()
1111 .v_scale_ratio = pipe_ctx->plane_res.scl_data.ratios.vert, in dcn401_set_cursor_position()
1130 if ((pipe_ctx->plane_state->src_rect.width != pipe_ctx->plane_res.scl_data.viewport.width) || in dcn401_set_cursor_position()
1131 (pipe_ctx->plane_state->src_rect.height != pipe_ctx->plane_res.scl_data.viewport.height)) { in dcn401_set_cursor_position()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dce110/ |
| D | dce110_hwseq.c | 1485 pipe_ctx->plane_res.scl_data.lb_params.depth, in program_scaler()
1503 &pipe_ctx->plane_res.scl_data); in program_scaler()
1692 pipe_ctx->plane_res.scl_data.lb_params.alpha_en = pipe_ctx->bottom_pipe != NULL; in dce110_apply_single_controller_ctx_to_hw()
2519 default_adjust.surface_pixel_format = pipe_ctx->plane_res.scl_data.format; in set_default_colors()
2526 default_adjust.lb_color_depth = pipe_ctx->plane_res.scl_data.lb_params.depth; in set_default_colors()
2917 pipe_ctx->plane_res.scl_data.lb_params.alpha_en = pipe_ctx->bottom_pipe != NULL; in dce110_program_front_end_for_pipe()
2976 pipe_ctx->plane_res.scl_data.viewport.width, in dce110_program_front_end_for_pipe()
2977 pipe_ctx->plane_res.scl_data.viewport.height, in dce110_program_front_end_for_pipe()
2978 pipe_ctx->plane_res.scl_data.viewport.x, in dce110_program_front_end_for_pipe()
2979 pipe_ctx->plane_res.scl_data.viewport.y, in dce110_program_front_end_for_pipe()
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