/linux-6.12.1/arch/powerpc/boot/ |
D | ns16550.c | 32 static u32 reg_shift; variable 36 out_8(reg_base + (UART_FCR << reg_shift), 0x06); in ns16550_open() 42 while ((in_8(reg_base + (UART_LSR << reg_shift)) & UART_LSR_THRE) == 0); in ns16550_putc() 48 while ((in_8(reg_base + (UART_LSR << reg_shift)) & UART_LSR_DR) == 0); in ns16550_getc() 54 return ((in_8(reg_base + (UART_LSR << reg_shift)) & UART_LSR_DR) != 0); in ns16550_tstc() 71 n = getprop(devp, "reg-shift", ®_shift, sizeof(reg_shift)); in ns16550_console_init() 72 if (n != sizeof(reg_shift)) in ns16550_console_init() 73 reg_shift = 0; in ns16550_console_init() 75 reg_shift = be32_to_cpu(reg_shift); in ns16550_console_init()
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/linux-6.12.1/drivers/input/misc/ |
D | iqs7222.c | 798 int reg_shift; member 812 .reg_shift = 8, 820 .reg_shift = 0, 828 .reg_shift = 6, 836 .reg_shift = 5, 843 .reg_shift = 4, 850 .reg_shift = 3, 857 .reg_shift = 0, 866 .reg_shift = 10, 873 .reg_shift = 4, [all …]
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/linux-6.12.1/drivers/ata/ |
D | pata_falcon.c | 132 int irq = 0, io_offset = 1, reg_shift = 2; /* Falcon defaults */ in pata_falcon_init_one() local 178 reg_shift = 0; in pata_falcon_init_one() 186 ap->ioaddr.error_addr = base + io_offset + (1 << reg_shift); in pata_falcon_init_one() 187 ap->ioaddr.feature_addr = base + io_offset + (1 << reg_shift); in pata_falcon_init_one() 188 ap->ioaddr.nsect_addr = base + io_offset + (2 << reg_shift); in pata_falcon_init_one() 189 ap->ioaddr.lbal_addr = base + io_offset + (3 << reg_shift); in pata_falcon_init_one() 190 ap->ioaddr.lbam_addr = base + io_offset + (4 << reg_shift); in pata_falcon_init_one() 191 ap->ioaddr.lbah_addr = base + io_offset + (5 << reg_shift); in pata_falcon_init_one() 192 ap->ioaddr.device_addr = base + io_offset + (6 << reg_shift); in pata_falcon_init_one() 193 ap->ioaddr.status_addr = base + io_offset + (7 << reg_shift); in pata_falcon_init_one() [all …]
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D | pata_pxa.c | 236 (ATA_REG_DATA << pdata->reg_shift); in pxa_ata_probe() 238 (ATA_REG_ERR << pdata->reg_shift); in pxa_ata_probe() 240 (ATA_REG_FEATURE << pdata->reg_shift); in pxa_ata_probe() 242 (ATA_REG_NSECT << pdata->reg_shift); in pxa_ata_probe() 244 (ATA_REG_LBAL << pdata->reg_shift); in pxa_ata_probe() 246 (ATA_REG_LBAM << pdata->reg_shift); in pxa_ata_probe() 248 (ATA_REG_LBAH << pdata->reg_shift); in pxa_ata_probe() 250 (ATA_REG_DEVICE << pdata->reg_shift); in pxa_ata_probe() 252 (ATA_REG_STATUS << pdata->reg_shift); in pxa_ata_probe() 254 (ATA_REG_CMD << pdata->reg_shift); in pxa_ata_probe()
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D | pata_of_platform.c | 29 unsigned int reg_shift = 0; in pata_of_platform_probe() local 59 of_property_read_u32(dn, "reg-shift", ®_shift); in pata_of_platform_probe() 76 reg_shift, pio_mask, &pata_platform_sht, in pata_of_platform_probe()
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/linux-6.12.1/drivers/gpio/ |
D | gpio-adnp.c | 15 #define GPIO_DDR(gpio) (0x00 << (gpio)->reg_shift) 16 #define GPIO_PLR(gpio) (0x01 << (gpio)->reg_shift) 17 #define GPIO_IER(gpio) (0x02 << (gpio)->reg_shift) 18 #define GPIO_ISR(gpio) (0x03 << (gpio)->reg_shift) 19 #define GPIO_PTR(gpio) (0x04 << (gpio)->reg_shift) 24 unsigned int reg_shift; member 69 unsigned int reg = offset >> adnp->reg_shift; in adnp_gpio_get() 83 unsigned int reg = offset >> adnp->reg_shift; in __adnp_gpio_set() 112 unsigned int reg = offset >> adnp->reg_shift; in adnp_gpio_direction_input() 149 unsigned int reg = offset >> adnp->reg_shift; in adnp_gpio_direction_output() [all …]
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D | gpio-creg-snps.c | 34 u32 reg, reg_shift, value; in creg_gpio_set() local 40 reg_shift = layout->shift[offset]; in creg_gpio_set() 42 reg_shift += layout->bit_per_gpio[i] + layout->shift[i]; in creg_gpio_set() 46 reg &= ~(GENMASK(layout->bit_per_gpio[i] - 1, 0) << reg_shift); in creg_gpio_set() 47 reg |= (value << reg_shift); in creg_gpio_set()
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D | gpio-htc-egpio.c | 37 int reg_shift; /* bit shift */ member 123 return bit >> ei->reg_shift; in egpio_pos() 128 return 1 << (bit & ((1 << ei->reg_shift)-1)); in egpio_bit() 189 shift = pos << ei->reg_shift; in egpio_set() 241 shift += (1<<ei->reg_shift)) { in egpio_write_cache() 298 ei->reg_shift = fls(pdata->reg_width - 1); in egpio_probe() 299 pr_debug("reg_shift = %d\n", ei->reg_shift); in egpio_probe()
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/linux-6.12.1/drivers/net/ethernet/stmicro/stmmac/ |
D | dwmac-socfpga.c | 51 u32 reg_shift; member 107 u32 reg_offset, reg_shift; in socfpga_dwmac_parse_data() local 128 ret = of_property_read_u32_index(np, "altr,sysmgr-syscon", 2, ®_shift); in socfpga_dwmac_parse_data() 222 dwmac->reg_shift = reg_shift; in socfpga_dwmac_parse_data() 277 u32 reg_shift = dwmac->reg_shift; in socfpga_gen5_set_phy_mode() local 297 ctrl &= ~(SYSMGR_EMACGRP_CTRL_PHYSEL_MASK << reg_shift); in socfpga_gen5_set_phy_mode() 298 ctrl |= val << reg_shift; in socfpga_gen5_set_phy_mode() 306 module |= (SYSMGR_FPGAGRP_MODULE_EMAC << (reg_shift / 2)); in socfpga_gen5_set_phy_mode() 312 ctrl |= SYSMGR_EMACGRP_CTRL_PTP_REF_CLK_MASK << (reg_shift / 2); in socfpga_gen5_set_phy_mode() 315 (reg_shift / 2)); in socfpga_gen5_set_phy_mode() [all …]
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D | stmmac_mdio.c | 288 value |= (phyreg << priv->hw->mii.reg_shift) & priv->hw->mii.reg_mask; in stmmac_mdio_read_c22() 328 value |= (phyreg << priv->hw->mii.reg_shift) & priv->hw->mii.reg_mask; in stmmac_mdio_read_c45() 334 value |= (devad << priv->hw->mii.reg_shift) & priv->hw->mii.reg_mask; in stmmac_mdio_read_c45() 387 value |= (phyreg << priv->hw->mii.reg_shift) & priv->hw->mii.reg_mask; in stmmac_mdio_write_c22() 428 value |= (phyreg << priv->hw->mii.reg_shift) & priv->hw->mii.reg_mask; in stmmac_mdio_write_c45() 436 value |= (devad << priv->hw->mii.reg_shift) & priv->hw->mii.reg_mask; in stmmac_mdio_write_c45()
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/linux-6.12.1/drivers/pinctrl/ |
D | pinctrl-mcp23s08_i2c.c | 26 mcp->reg_shift = info->reg_shift; in mcp230xx_probe() 50 .reg_shift = 0, 58 .reg_shift = 1, 66 .reg_shift = 1,
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D | pinctrl-mcp23s08_spi.c | 122 mcp->reg_shift = info->reg_shift; in mcp23s08_spi_regmap_init() 203 .reg_shift = 0, 210 .reg_shift = 1, 218 .reg_shift = 1,
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D | pinctrl-mcp23s08.h | 30 bool reg_shift; member 36 bool reg_shift; member
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/linux-6.12.1/drivers/i2c/busses/ |
D | i2c-ocores.c | 35 u32 reg_shift; member 90 iowrite8(value, i2c->base + (reg << i2c->reg_shift)); in oc_setreg_8() 95 iowrite16(value, i2c->base + (reg << i2c->reg_shift)); in oc_setreg_16() 100 iowrite32(value, i2c->base + (reg << i2c->reg_shift)); in oc_setreg_32() 105 iowrite16be(value, i2c->base + (reg << i2c->reg_shift)); in oc_setreg_16be() 110 iowrite32be(value, i2c->base + (reg << i2c->reg_shift)); in oc_setreg_32be() 115 return ioread8(i2c->base + (reg << i2c->reg_shift)); in oc_getreg_8() 120 return ioread16(i2c->base + (reg << i2c->reg_shift)); in oc_getreg_16() 125 return ioread32(i2c->base + (reg << i2c->reg_shift)); in oc_getreg_32() 130 return ioread16be(i2c->base + (reg << i2c->reg_shift)); in oc_getreg_16be() [all …]
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/linux-6.12.1/drivers/mmc/host/ |
D | dw_mmc-pltfm.c | 27 #define SYSMGR_SDMMC_CTRL_SET(smplsel, drvsel, reg_shift) \ argument 28 ((((smplsel) & 0x7) << reg_shift) | (((drvsel) & 0x7) << 0)) 74 u32 clk_phase[2] = {0}, reg_offset, reg_shift; in dw_mci_socfpga_priv_init() local 88 of_property_read_u32_index(np, "altr,sysmgr-syscon", 2, ®_shift); in dw_mci_socfpga_priv_init() 93 hs_timing = SYSMGR_SDMMC_CTRL_SET(clk_phase[0], clk_phase[1], reg_shift); in dw_mci_socfpga_priv_init()
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/linux-6.12.1/drivers/input/touchscreen/ |
D | iqs7211.c | 480 int reg_shift; member 506 .reg_shift = 9, 527 .reg_shift = 5, 548 .reg_shift = 0, 566 .reg_shift = 0, 578 .reg_shift = 8, 620 .reg_shift = 8, 630 .reg_shift = 0, 726 .reg_shift = 8, 785 .reg_shift = 15, [all …]
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/linux-6.12.1/drivers/gpu/drm/msm/disp/dpu1/ |
D | dpu_hw_vbif.c | 161 u32 reg_lvl, reg_val, reg_val_lvl, mask, reg_high, reg_shift; in dpu_hw_set_qos_remap() local 170 reg_shift = (xin_id & 0x7) * 4; in dpu_hw_set_qos_remap() 175 mask = 0x7 << reg_shift; in dpu_hw_set_qos_remap() 178 reg_val |= (remap_level << reg_shift) & mask; in dpu_hw_set_qos_remap() 181 reg_val_lvl |= (remap_level << reg_shift) & mask; in dpu_hw_set_qos_remap()
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/linux-6.12.1/drivers/thermal/broadcom/ |
D | brcmstb_thermal.c | 75 int reg_shift; member 85 .reg_shift = AVS_TMON_INT_THRESH_low_shift, 93 .reg_shift = AVS_TMON_INT_THRESH_high_shift, 101 .reg_shift = AVS_TMON_RESET_THRESH_shift, 198 val >>= trip->reg_shift; in avs_tmon_get_trip_temp() 216 val <<= trip->reg_shift; in avs_tmon_set_trip_temp()
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/linux-6.12.1/arch/mips/include/asm/ |
D | setup.h | 14 unsigned int reg_shift, unsigned int timeout); 17 unsigned int reg_shift, unsigned int timeout) {} in setup_8250_early_printk_port() argument
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/linux-6.12.1/arch/mips/kernel/ |
D | early_printk_8250.c | 16 void setup_8250_early_printk_port(unsigned long base, unsigned int reg_shift, in setup_8250_early_printk_port() argument 20 serial8250_reg_shift = reg_shift; in setup_8250_early_printk_port()
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/linux-6.12.1/arch/mips/bcm47xx/ |
D | serial.c | 45 p->regshift = ssb_port->reg_shift; in uart8250_init_ssb() 71 p->regshift = bcma_port->reg_shift; in uart8250_init_bcma()
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/linux-6.12.1/arch/arm/mach-omap2/ |
D | prm2xxx.c | 63 while (p->reg_shift >= 0 && p->std_shift >= 0) { in omap2xxx_prm_read_reset_sources() 64 if (v & (1 << p->reg_shift)) in omap2xxx_prm_read_reset_sources()
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/linux-6.12.1/include/linux/platform_data/ |
D | ata-pxa.h | 15 uint32_t reg_shift; member
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D | i2c-ocores.h | 12 u32 reg_shift; /* register offset shift value */ member
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/linux-6.12.1/include/linux/ |
D | 8250_pci.h | 28 unsigned int reg_shift; member
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