Searched refs:pll_state (Results 1 – 6 of 6) sorted by relevance
| /linux-6.12.1/drivers/gpu/drm/i915/display/ ! |
| D | intel_cx0_phy.c | 2007 struct intel_cx0pll_state *pll_state = &crtc_state->dpll_hw_state.cx0pll; in intel_c10pll_update_pll() local
2014 pll_state->ssc_enabled = in intel_c10pll_update_pll()
2019 if (pll_state->ssc_enabled) in intel_c10pll_update_pll()
2022 drm_WARN_ON(&i915->drm, ARRAY_SIZE(pll_state->c10.pll) < 9); in intel_c10pll_update_pll()
2024 pll_state->c10.pll[i] = 0; in intel_c10pll_update_pll()
2051 struct intel_c10pll_state *pll_state) in intel_c10pll_readout_hw_state() argument
2067 for (i = 0; i < ARRAY_SIZE(pll_state->pll); i++) in intel_c10pll_readout_hw_state()
2068 pll_state->pll[i] = intel_cx0_read(encoder, lane, PHY_C10_VDR_PLL(i)); in intel_c10pll_readout_hw_state()
2070 pll_state->cmn = intel_cx0_read(encoder, lane, PHY_C10_VDR_CMN(0)); in intel_c10pll_readout_hw_state()
2071 pll_state->tx = intel_cx0_read(encoder, lane, PHY_C10_VDR_TX(0)); in intel_c10pll_readout_hw_state()
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| D | intel_snps_phy.c | 1826 const struct intel_mpllb_state *pll_state = &crtc_state->dpll_hw_state.mpllb; in intel_mpllb_enable() local
1835 intel_de_write(dev_priv, SNPS_PHY_MPLLB_CP(phy), pll_state->mpllb_cp); in intel_mpllb_enable()
1836 intel_de_write(dev_priv, SNPS_PHY_MPLLB_DIV(phy), pll_state->mpllb_div); in intel_mpllb_enable()
1837 intel_de_write(dev_priv, SNPS_PHY_MPLLB_DIV2(phy), pll_state->mpllb_div2); in intel_mpllb_enable()
1838 intel_de_write(dev_priv, SNPS_PHY_MPLLB_SSCEN(phy), pll_state->mpllb_sscen); in intel_mpllb_enable()
1839 intel_de_write(dev_priv, SNPS_PHY_MPLLB_SSCSTEP(phy), pll_state->mpllb_sscstep); in intel_mpllb_enable()
1840 intel_de_write(dev_priv, SNPS_PHY_MPLLB_FRACN1(phy), pll_state->mpllb_fracn1); in intel_mpllb_enable()
1841 intel_de_write(dev_priv, SNPS_PHY_MPLLB_FRACN2(phy), pll_state->mpllb_fracn2); in intel_mpllb_enable()
1862 pll_state->mpllb_div | SNPS_PHY_MPLLB_FORCE_EN); in intel_mpllb_enable()
1922 const struct intel_mpllb_state *pll_state) in intel_mpllb_calc_port_clock() argument
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| D | intel_snps_phy.h | 29 struct intel_mpllb_state *pll_state);
31 const struct intel_mpllb_state *pll_state);
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| D | intel_cx0_phy.h | 34 struct intel_cx0pll_state *pll_state);
36 const struct intel_cx0pll_state *pll_state);
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| /linux-6.12.1/drivers/clk/ ! |
| D | clk-stm32f4.c | 667 int pll_state; in stm32f4_pll_set_rate() local
669 pll_state = stm32f4_pll_is_enabled(hw); in stm32f4_pll_set_rate()
671 if (pll_state) in stm32f4_pll_set_rate()
680 if (pll_state) in stm32f4_pll_set_rate()
717 int pll_state, ret; in stm32f4_pll_div_set_rate() local
722 pll_state = stm32f4_pll_is_enabled(pll_div->hw_pll); in stm32f4_pll_div_set_rate()
724 if (pll_state) in stm32f4_pll_div_set_rate()
729 if (pll_state) in stm32f4_pll_div_set_rate()
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| /linux-6.12.1/sound/soc/codecs/ ! |
| D | wm8580.c | 228 struct pll_state { struct
248 struct pll_state a; argument
249 struct pll_state b;
466 struct pll_state *state; in wm8580_set_dai_pll()
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