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Searched refs:indirect (Results 1 – 25 of 142) sorted by relevance

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/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Dvcn_v4_0_5.c431 static void vcn_v4_0_5_mc_resume_dpg_mode(struct amdgpu_device *adev, int inst_idx, bool indirect) in vcn_v4_0_5_mc_resume_dpg_mode() argument
441 if (!indirect) { in vcn_v4_0_5_mc_resume_dpg_mode()
445 0, indirect); in vcn_v4_0_5_mc_resume_dpg_mode()
449 0, indirect); in vcn_v4_0_5_mc_resume_dpg_mode()
451 VCN, inst_idx, regUVD_VCPU_CACHE_OFFSET0), 0, 0, indirect); in vcn_v4_0_5_mc_resume_dpg_mode()
454 VCN, inst_idx, regUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW), 0, 0, indirect); in vcn_v4_0_5_mc_resume_dpg_mode()
456 VCN, inst_idx, regUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH), 0, 0, indirect); in vcn_v4_0_5_mc_resume_dpg_mode()
458 VCN, inst_idx, regUVD_VCPU_CACHE_OFFSET0), 0, 0, indirect); in vcn_v4_0_5_mc_resume_dpg_mode()
464 lower_32_bits(adev->vcn.inst[inst_idx].gpu_addr), 0, indirect); in vcn_v4_0_5_mc_resume_dpg_mode()
467 upper_32_bits(adev->vcn.inst[inst_idx].gpu_addr), 0, indirect); in vcn_v4_0_5_mc_resume_dpg_mode()
[all …]
Dvcn_v4_0_3.c97 int inst_idx, bool indirect);
452 static void vcn_v4_0_3_mc_resume_dpg_mode(struct amdgpu_device *adev, int inst_idx, bool indirect) in vcn_v4_0_3_mc_resume_dpg_mode() argument
462 if (!indirect) { in vcn_v4_0_3_mc_resume_dpg_mode()
466 inst_idx].tmr_mc_addr_lo), 0, indirect); in vcn_v4_0_3_mc_resume_dpg_mode()
470 inst_idx].tmr_mc_addr_hi), 0, indirect); in vcn_v4_0_3_mc_resume_dpg_mode()
472 VCN, 0, regUVD_VCPU_CACHE_OFFSET0), 0, 0, indirect); in vcn_v4_0_3_mc_resume_dpg_mode()
475 VCN, 0, regUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW), 0, 0, indirect); in vcn_v4_0_3_mc_resume_dpg_mode()
477 VCN, 0, regUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH), 0, 0, indirect); in vcn_v4_0_3_mc_resume_dpg_mode()
479 VCN, 0, regUVD_VCPU_CACHE_OFFSET0), 0, 0, indirect); in vcn_v4_0_3_mc_resume_dpg_mode()
485 lower_32_bits(adev->vcn.inst[inst_idx].gpu_addr), 0, indirect); in vcn_v4_0_3_mc_resume_dpg_mode()
[all …]
Dvcn_v5_0_0.c395 static void vcn_v5_0_0_mc_resume_dpg_mode(struct amdgpu_device *adev, int inst_idx, bool indirect) in vcn_v5_0_0_mc_resume_dpg_mode() argument
405 if (!indirect) { in vcn_v5_0_0_mc_resume_dpg_mode()
408 (adev->firmware.ucode[AMDGPU_UCODE_ID_VCN + inst_idx].tmr_mc_addr_lo), 0, indirect); in vcn_v5_0_0_mc_resume_dpg_mode()
411 (adev->firmware.ucode[AMDGPU_UCODE_ID_VCN + inst_idx].tmr_mc_addr_hi), 0, indirect); in vcn_v5_0_0_mc_resume_dpg_mode()
413 VCN, inst_idx, regUVD_VCPU_CACHE_OFFSET0), 0, 0, indirect); in vcn_v5_0_0_mc_resume_dpg_mode()
416 VCN, inst_idx, regUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW), 0, 0, indirect); in vcn_v5_0_0_mc_resume_dpg_mode()
418 VCN, inst_idx, regUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH), 0, 0, indirect); in vcn_v5_0_0_mc_resume_dpg_mode()
420 VCN, inst_idx, regUVD_VCPU_CACHE_OFFSET0), 0, 0, indirect); in vcn_v5_0_0_mc_resume_dpg_mode()
426 lower_32_bits(adev->vcn.inst[inst_idx].gpu_addr), 0, indirect); in vcn_v5_0_0_mc_resume_dpg_mode()
429 upper_32_bits(adev->vcn.inst[inst_idx].gpu_addr), 0, indirect); in vcn_v5_0_0_mc_resume_dpg_mode()
[all …]
Dvcn_v2_5.c517 static void vcn_v2_5_mc_resume_dpg_mode(struct amdgpu_device *adev, int inst_idx, bool indirect) in vcn_v2_5_mc_resume_dpg_mode() argument
524 if (!indirect) { in vcn_v2_5_mc_resume_dpg_mode()
527 (adev->firmware.ucode[AMDGPU_UCODE_ID_VCN + inst_idx].tmr_mc_addr_lo), 0, indirect); in vcn_v2_5_mc_resume_dpg_mode()
530 (adev->firmware.ucode[AMDGPU_UCODE_ID_VCN + inst_idx].tmr_mc_addr_hi), 0, indirect); in vcn_v2_5_mc_resume_dpg_mode()
532 VCN, 0, mmUVD_VCPU_CACHE_OFFSET0), 0, 0, indirect); in vcn_v2_5_mc_resume_dpg_mode()
535 VCN, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW), 0, 0, indirect); in vcn_v2_5_mc_resume_dpg_mode()
537 VCN, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH), 0, 0, indirect); in vcn_v2_5_mc_resume_dpg_mode()
539 VCN, 0, mmUVD_VCPU_CACHE_OFFSET0), 0, 0, indirect); in vcn_v2_5_mc_resume_dpg_mode()
545 lower_32_bits(adev->vcn.inst[inst_idx].gpu_addr), 0, indirect); in vcn_v2_5_mc_resume_dpg_mode()
548 upper_32_bits(adev->vcn.inst[inst_idx].gpu_addr), 0, indirect); in vcn_v2_5_mc_resume_dpg_mode()
[all …]
Dvcn_v4_0.c483 static void vcn_v4_0_mc_resume_dpg_mode(struct amdgpu_device *adev, int inst_idx, bool indirect) in vcn_v4_0_mc_resume_dpg_mode() argument
492 if (!indirect) { in vcn_v4_0_mc_resume_dpg_mode()
495 (adev->firmware.ucode[AMDGPU_UCODE_ID_VCN + inst_idx].tmr_mc_addr_lo), 0, indirect); in vcn_v4_0_mc_resume_dpg_mode()
498 (adev->firmware.ucode[AMDGPU_UCODE_ID_VCN + inst_idx].tmr_mc_addr_hi), 0, indirect); in vcn_v4_0_mc_resume_dpg_mode()
500 VCN, inst_idx, regUVD_VCPU_CACHE_OFFSET0), 0, 0, indirect); in vcn_v4_0_mc_resume_dpg_mode()
503 VCN, inst_idx, regUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW), 0, 0, indirect); in vcn_v4_0_mc_resume_dpg_mode()
505 VCN, inst_idx, regUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH), 0, 0, indirect); in vcn_v4_0_mc_resume_dpg_mode()
507 VCN, inst_idx, regUVD_VCPU_CACHE_OFFSET0), 0, 0, indirect); in vcn_v4_0_mc_resume_dpg_mode()
513 lower_32_bits(adev->vcn.inst[inst_idx].gpu_addr), 0, indirect); in vcn_v4_0_mc_resume_dpg_mode()
516 upper_32_bits(adev->vcn.inst[inst_idx].gpu_addr), 0, indirect); in vcn_v4_0_mc_resume_dpg_mode()
[all …]
Dvcn_v2_0.c431 static void vcn_v2_0_mc_resume_dpg_mode(struct amdgpu_device *adev, bool indirect) in vcn_v2_0_mc_resume_dpg_mode() argument
438 if (!indirect) { in vcn_v2_0_mc_resume_dpg_mode()
441 (adev->firmware.ucode[AMDGPU_UCODE_ID_VCN].tmr_mc_addr_lo), 0, indirect); in vcn_v2_0_mc_resume_dpg_mode()
444 (adev->firmware.ucode[AMDGPU_UCODE_ID_VCN].tmr_mc_addr_hi), 0, indirect); in vcn_v2_0_mc_resume_dpg_mode()
446 UVD, 0, mmUVD_VCPU_CACHE_OFFSET0), 0, 0, indirect); in vcn_v2_0_mc_resume_dpg_mode()
449 UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW), 0, 0, indirect); in vcn_v2_0_mc_resume_dpg_mode()
451 UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH), 0, 0, indirect); in vcn_v2_0_mc_resume_dpg_mode()
453 UVD, 0, mmUVD_VCPU_CACHE_OFFSET0), 0, 0, indirect); in vcn_v2_0_mc_resume_dpg_mode()
459 lower_32_bits(adev->vcn.inst->gpu_addr), 0, indirect); in vcn_v2_0_mc_resume_dpg_mode()
462 upper_32_bits(adev->vcn.inst->gpu_addr), 0, indirect); in vcn_v2_0_mc_resume_dpg_mode()
[all …]
Djpeg_v5_0_0.c279 int inst_idx, uint8_t indirect) in jpeg_engine_5_0_0_dpg_clock_gating_mode() argument
292 if (indirect) { in jpeg_engine_5_0_0_dpg_clock_gating_mode()
293 ADD_SOC24_JPEG_TO_DPG_SRAM(inst_idx, vcnipJPEG_CGC_CTRL, data, indirect); in jpeg_engine_5_0_0_dpg_clock_gating_mode()
297 ADD_SOC24_JPEG_TO_DPG_SRAM(inst_idx, vcnipJPEG_CGC_GATE, data, indirect); in jpeg_engine_5_0_0_dpg_clock_gating_mode()
299 WREG32_SOC24_JPEG_DPG_MODE(inst_idx, vcnipJPEG_CGC_CTRL, data, indirect); in jpeg_engine_5_0_0_dpg_clock_gating_mode()
303 WREG32_SOC24_JPEG_DPG_MODE(inst_idx, vcnipJPEG_CGC_GATE, data, indirect); in jpeg_engine_5_0_0_dpg_clock_gating_mode()
316 static int jpeg_v5_0_0_start_dpg_mode(struct amdgpu_device *adev, int inst_idx, bool indirect) in jpeg_v5_0_0_start_dpg_mode() argument
328 if (indirect) in jpeg_v5_0_0_start_dpg_mode()
332 jpeg_engine_5_0_0_dpg_clock_gating_mode(adev, inst_idx, indirect); in jpeg_v5_0_0_start_dpg_mode()
335 if (indirect) in jpeg_v5_0_0_start_dpg_mode()
[all …]
Damdgpu_jpeg.h35 #define WREG32_SOC15_JPEG_DPG_MODE(inst_idx, offset, value, indirect) \ argument
37 if (!indirect) { \
45 indirect << UVD_DPG_LMA_CTL__SRAM_SEL__SHIFT)); \
63 #define WREG32_SOC24_JPEG_DPG_MODE(inst_idx, offset, value, indirect) \ argument
74 indirect << UVD_DPG_LMA_CTL__SRAM_SEL__SHIFT)); \
88 #define ADD_SOC24_JPEG_TO_DPG_SRAM(inst_idx, offset, value, indirect) \ argument
Dvcn_v3_0.c543 static void vcn_v3_0_mc_resume_dpg_mode(struct amdgpu_device *adev, int inst_idx, bool indirect) in vcn_v3_0_mc_resume_dpg_mode() argument
550 if (!indirect) { in vcn_v3_0_mc_resume_dpg_mode()
553 (adev->firmware.ucode[AMDGPU_UCODE_ID_VCN + inst_idx].tmr_mc_addr_lo), 0, indirect); in vcn_v3_0_mc_resume_dpg_mode()
556 (adev->firmware.ucode[AMDGPU_UCODE_ID_VCN + inst_idx].tmr_mc_addr_hi), 0, indirect); in vcn_v3_0_mc_resume_dpg_mode()
558 VCN, inst_idx, mmUVD_VCPU_CACHE_OFFSET0), 0, 0, indirect); in vcn_v3_0_mc_resume_dpg_mode()
561 VCN, inst_idx, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW), 0, 0, indirect); in vcn_v3_0_mc_resume_dpg_mode()
563 VCN, inst_idx, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH), 0, 0, indirect); in vcn_v3_0_mc_resume_dpg_mode()
565 VCN, inst_idx, mmUVD_VCPU_CACHE_OFFSET0), 0, 0, indirect); in vcn_v3_0_mc_resume_dpg_mode()
571 lower_32_bits(adev->vcn.inst[inst_idx].gpu_addr), 0, indirect); in vcn_v3_0_mc_resume_dpg_mode()
574 upper_32_bits(adev->vcn.inst[inst_idx].gpu_addr), 0, indirect); in vcn_v3_0_mc_resume_dpg_mode()
[all …]
Djpeg_v4_0_5.c328 int inst_idx, uint8_t indirect) in jpeg_engine_4_0_5_dpg_clock_gating_mode() argument
339 WREG32_SOC15_JPEG_DPG_MODE(inst_idx, regJPEG_CGC_CTRL_INTERNAL_OFFSET, data, indirect); in jpeg_engine_4_0_5_dpg_clock_gating_mode()
343 data, indirect); in jpeg_engine_4_0_5_dpg_clock_gating_mode()
393 static void jpeg_v4_0_5_start_dpg_mode(struct amdgpu_device *adev, int inst_idx, bool indirect) in jpeg_v4_0_5_start_dpg_mode() argument
416 if (indirect) in jpeg_v4_0_5_start_dpg_mode()
420 jpeg_engine_4_0_5_dpg_clock_gating_mode(adev, inst_idx, indirect); in jpeg_v4_0_5_start_dpg_mode()
424 adev->gfx.config.gb_addr_config, indirect); in jpeg_v4_0_5_start_dpg_mode()
427 JPEG_SYS_INT_EN__DJRBC_MASK, indirect); in jpeg_v4_0_5_start_dpg_mode()
430 WREG32_SOC15_JPEG_DPG_MODE(inst_idx, regUVD_NO_OP_INTERNAL_OFFSET, 0, indirect); in jpeg_v4_0_5_start_dpg_mode()
432 if (indirect) in jpeg_v4_0_5_start_dpg_mode()
/linux-6.12.1/arch/x86/kernel/
Dksysfs.c95 struct setup_indirect *indirect; in get_setup_data_size() local
114 indirect = (struct setup_indirect *)data->data; in get_setup_data_size()
116 if (indirect->type != SETUP_INDIRECT) in get_setup_data_size()
117 *size = indirect->len; in get_setup_data_size()
138 struct setup_indirect *indirect; in type_show() local
162 indirect = (struct setup_indirect *)data->data; in type_show()
164 ret = sprintf(buf, "0x%x\n", indirect->type); in type_show()
179 struct setup_indirect *indirect; in setup_data_data_read() local
203 indirect = (struct setup_indirect *)data->data; in setup_data_data_read()
205 if (indirect->type != SETUP_INDIRECT) { in setup_data_data_read()
[all …]
Dkdebugfs.c91 struct setup_indirect *indirect; in create_setup_data_nodes() local
129 indirect = (struct setup_indirect *)data->data; in create_setup_data_nodes()
131 if (indirect->type != SETUP_INDIRECT) { in create_setup_data_nodes()
132 node->paddr = indirect->addr; in create_setup_data_nodes()
133 node->type = indirect->type; in create_setup_data_nodes()
134 node->len = indirect->len; in create_setup_data_nodes()
/linux-6.12.1/Documentation/filesystems/ext4/
Dblockmap.rst16 | 13 | Double-indirect block: (file blocks ``$block_size``/4 + 12 to (``$block_siz…
21 | | | 0 to (``$block_size`` / 4) | Map to (``$block_size`` / 4) indirect bl…
30 | 14 | Triple-indirect block: (file blocks (``$block_size`` / 4) ^ 2 + (``$block_s…
35 … | 0 to (``$block_size`` / 4) | Map to (``$block_size`` / 4) double indirect blocks (1024 if 4…
40 … | | 0 to (``$block_size`` / 4) | Map to (``$block_size`` / 4) indirect blocks (1024 if 4…
/linux-6.12.1/drivers/net/ethernet/intel/idpf/
Didpf_controlq.c80 desc->params.indirect.addr_high = in idpf_ctlq_init_rxq_bufs()
82 desc->params.indirect.addr_low = in idpf_ctlq_init_rxq_bufs()
84 desc->params.indirect.param0 = 0; in idpf_ctlq_init_rxq_bufs()
85 desc->params.indirect.sw_cookie = 0; in idpf_ctlq_init_rxq_bufs()
86 desc->params.indirect.v_flags = 0; in idpf_ctlq_init_rxq_bufs()
298 struct idpf_dma_mem *buff = msg->ctx.indirect.payload; in idpf_ctlq_send()
307 desc->params.indirect.addr_high = in idpf_ctlq_send()
309 desc->params.indirect.addr_low = in idpf_ctlq_send()
312 memcpy(&desc->params, msg->ctx.indirect.context, in idpf_ctlq_send()
497 desc->params.indirect.addr_high = in idpf_ctlq_post_rx_buffs()
[all …]
/linux-6.12.1/arch/arm64/kvm/hyp/
Dhyp-entry.S216 .macro hyp_ventry indirect, spectrev2
226 .if \indirect != 0
249 .macro generate_vectors indirect, spectrev2
252 hyp_ventry \indirect, \spectrev2
259 generate_vectors indirect = 0, spectrev2 = 1 // HYP_VECTOR_SPECTRE_DIRECT
260 generate_vectors indirect = 1, spectrev2 = 0 // HYP_VECTOR_INDIRECT
261 generate_vectors indirect = 1, spectrev2 = 1 // HYP_VECTOR_SPECTRE_INDIRECT
/linux-6.12.1/drivers/block/xen-blkback/
Dblkback.c928 pages[i]->gref = req->u.indirect.indirect_grefs[i]; in xen_blkbk_parse_indirect()
1105 dst->u.indirect.indirect_op = src->u.indirect.indirect_op; in blkif_get_x86_32_req()
1106 dst->u.indirect.nr_segments = in blkif_get_x86_32_req()
1107 READ_ONCE(src->u.indirect.nr_segments); in blkif_get_x86_32_req()
1108 dst->u.indirect.handle = src->u.indirect.handle; in blkif_get_x86_32_req()
1109 dst->u.indirect.id = src->u.indirect.id; in blkif_get_x86_32_req()
1110 dst->u.indirect.sector_number = src->u.indirect.sector_number; in blkif_get_x86_32_req()
1112 INDIRECT_PAGES(dst->u.indirect.nr_segments)); in blkif_get_x86_32_req()
1114 dst->u.indirect.indirect_grefs[i] = in blkif_get_x86_32_req()
1115 src->u.indirect.indirect_grefs[i]; in blkif_get_x86_32_req()
[all …]
/linux-6.12.1/tools/testing/selftests/bpf/progs/
Dmap_ptr_kern.c50 static inline int check_bpf_map_ptr(struct bpf_map *indirect, in check_bpf_map_ptr() argument
53 VERIFY(indirect->map_type == direct->map_type); in check_bpf_map_ptr()
54 VERIFY(indirect->key_size == direct->key_size); in check_bpf_map_ptr()
55 VERIFY(indirect->value_size == direct->value_size); in check_bpf_map_ptr()
56 VERIFY(indirect->max_entries == direct->max_entries); in check_bpf_map_ptr()
57 VERIFY(indirect->id == direct->id); in check_bpf_map_ptr()
62 static inline int check(struct bpf_map *indirect, struct bpf_map *direct, in check() argument
65 VERIFY(check_bpf_map_ptr(indirect, direct)); in check()
66 VERIFY(check_bpf_map_fields(indirect, key_size, value_size, in check()
71 static inline int check_default(struct bpf_map *indirect, in check_default() argument
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/linux-6.12.1/Documentation/admin-guide/hw-vuln/
Dspectre.rst62 execution of indirect branches to leak privileged memory.
93 execution of indirect branches :ref:`[3] <spec_ref3>`. The indirect
95 indirect branches can be influenced by an attacker, causing gadget code
102 In Spectre variant 2 attacks, the attacker can steer speculative indirect
104 buffer of a CPU used for predicting indirect branch addresses. Such
105 poisoning could be done by indirect branching into existing code,
106 with the address offset of the indirect branch under the attacker's
109 this could cause privileged code's indirect branch to jump to a gadget
130 steer its indirect branch speculations to gadget code, and measure the
135 Branch History Buffer (BHB) to speculatively steer an indirect branch
[all …]
/linux-6.12.1/arch/x86/mm/
Dioremap.c638 struct setup_indirect *indirect; in memremap_is_setup_data() local
674 indirect = (struct setup_indirect *)data->data; in memremap_is_setup_data()
676 if (indirect->type != SETUP_INDIRECT) { in memremap_is_setup_data()
677 paddr = indirect->addr; in memremap_is_setup_data()
678 len = indirect->len; in memremap_is_setup_data()
700 struct setup_indirect *indirect; in early_memremap_is_setup_data() local
737 indirect = (struct setup_indirect *)data->data; in early_memremap_is_setup_data()
739 if (indirect->type != SETUP_INDIRECT) { in early_memremap_is_setup_data()
740 paddr = indirect->addr; in early_memremap_is_setup_data()
741 len = indirect->len; in early_memremap_is_setup_data()
/linux-6.12.1/drivers/net/can/sja1000/
Dsja1000_isa.c37 static int indirect[MAXDEV] = {[0 ... (MAXDEV - 1)] = -1}; variable
46 module_param_hw_array(indirect, int, ioport, NULL, 0444);
47 MODULE_PARM_DESC(indirect, "Indirect access via address and data port");
139 if (indirect[idx] > 0 || in sja1000_isa_probe()
140 (indirect[idx] == -1 && indirect[0] > 0)) in sja1000_isa_probe()
/linux-6.12.1/arch/m68k/math-emu/
Dfp_decode.h196 | test if %pc is the base register for the indirect addr mode
220 | addressing mode: address register indirect
244 | addressing mode: address register indirect with postincrement
263 | addressing mode: address register indirect with predecrement
289 | addressing mode: address register/programm counter indirect
331 | all other indirect addressing modes will finally end up here
345 | addressing mode: address register/programm counter indirect
355 3: | addressing mode: address register/programm counter memory indirect
Dfp_move.S135 | addressing mode: address register indirect
140 | addressing mode: address register indirect with postincrement
145 | addressing mode: address register indirect with predecrement
150 | addressing mode: address register indirect with 16bit displacement
/linux-6.12.1/drivers/net/can/cc770/
Dcc770_isa.c75 static int indirect[MAXDEV] = {[0 ... (MAXDEV - 1)] = -1}; variable
83 module_param_hw_array(indirect, int, ioport, NULL, 0444);
84 MODULE_PARM_DESC(indirect, "Indirect access via address and data port");
184 if (indirect[idx] > 0 || in cc770_isa_probe()
185 (indirect[idx] == -1 && indirect[0] > 0)) in cc770_isa_probe()
/linux-6.12.1/Documentation/virt/
Dparavirt_ops.rst23 - simple indirect call
25 known that the overhead of indirect call isn't very important.
27 - indirect call which allows optimization with binary patch
/linux-6.12.1/fs/befs/
Ddatastream.c189 metablocks += ds->indirect.len; in befs_count_blocks()
317 befs_block_run indirect = data->indirect; in befs_find_brun_indirect() local
318 befs_blocknr_t indirblockno = iaddr2blockno(sb, &indirect); in befs_find_brun_indirect()
327 for (i = 0; i < indirect.len; i++) { in befs_find_brun_indirect()

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