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Searched refs:get_vupdate_offset_from_vsync (Results 1 – 15 of 15) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dcn10/
Ddcn10_init.c79 .get_vupdate_offset_from_vsync = dcn10_get_vupdate_offset_from_vsync,
Ddcn10_hwseq.c3806 int vupdate_pos = dc->hwss.get_vupdate_offset_from_vsync(pipe_ctx); in dcn10_calc_vupdate_position()
3830 vline_pos += dc->hwss.get_vupdate_offset_from_vsync(pipe_ctx); in dcn10_cal_vline_position()
3860 int start_line = dc->hwss.get_vupdate_offset_from_vsync(pipe_ctx); in dcn10_setup_vupdate_interrupt()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dcn201/
Ddcn201_init.c81 .get_vupdate_offset_from_vsync = dcn10_get_vupdate_offset_from_vsync,
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dcn301/
Ddcn301_init.c96 .get_vupdate_offset_from_vsync = dcn10_get_vupdate_offset_from_vsync,
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dcn20/
Ddcn20_init.c92 .get_vupdate_offset_from_vsync = dcn10_get_vupdate_offset_from_vsync,
Ddcn20_hwseq.c2760 int start_line = dc->hwss.get_vupdate_offset_from_vsync(pipe_ctx); in dcn20_setup_vupdate_interrupt()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dcn21/
Ddcn21_init.c94 .get_vupdate_offset_from_vsync = dcn10_get_vupdate_offset_from_vsync,
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dcn31/
Ddcn31_init.c99 .get_vupdate_offset_from_vsync = dcn10_get_vupdate_offset_from_vsync,
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dcn30/
Ddcn30_init.c96 .get_vupdate_offset_from_vsync = dcn10_get_vupdate_offset_from_vsync,
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dcn314/
Ddcn314_init.c101 .get_vupdate_offset_from_vsync = dcn10_get_vupdate_offset_from_vsync,
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dcn401/
Ddcn401_init.c76 .get_vupdate_offset_from_vsync = dcn10_get_vupdate_offset_from_vsync,
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dcn351/
Ddcn351_init.c101 .get_vupdate_offset_from_vsync = dcn10_get_vupdate_offset_from_vsync,
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dcn35/
Ddcn35_init.c102 .get_vupdate_offset_from_vsync = dcn10_get_vupdate_offset_from_vsync,
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dcn32/
Ddcn32_init.c97 .get_vupdate_offset_from_vsync = dcn10_get_vupdate_offset_from_vsync,
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/
Dhw_sequencer.h257 int (*get_vupdate_offset_from_vsync)(struct pipe_ctx *pipe_ctx); member