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Searched refs:divm_shift (Results 1 – 6 of 6) sorted by relevance

/linux-6.12.1/drivers/clk/tegra/
Dclk-tegra124.c144 .divm_shift = 0,
240 .divm_shift = 0,
314 .divm_shift = 0,
402 .divm_shift = 0,
462 .divm_shift = 0,
501 .divm_shift = 0,
529 .divm_shift = 0,
594 .divm_shift = 0,
711 .divm_shift = 0,
Dclk-tegra114.c140 .divm_shift = 0,
202 .divm_shift = 0,
273 .divm_shift = 0,
322 .divm_shift = 0,
448 .divm_shift = 0,
546 .divm_shift = 0,
575 .divm_shift = 0,
Dclk-pll.c252 #define divm_shift(p) (p)->params->div_nmp->divm_shift macro
256 #define divm_mask_shifted(p) (divm_mask(p) << divm_shift(p))
270 .divm_shift = PLL_BASE_DIVM_SHIFT,
682 val |= (cfg->m << divm_shift(pll)) | in _update_pll_mnp()
713 cfg->m = (val >> div_nmp->divm_shift) & divm_mask(pll); in _get_pll_mnp()
990 val |= sel.m << divm_shift(pll); in clk_plle_enable()
1026 divm = (val >> pll->params->div_nmp->divm_shift) & (divm_mask(pll)); in clk_plle_recalc_rate()
1653 val |= sel.m << divm_shift(pll); in clk_plle_tegra114_enable()
1945 .divm_shift = PLLE_BASE_DIVM_SHIFT,
2136 val = m << divm_shift(pll); in tegra_clk_register_pllre()
[all …]
Dclk-tegra210.c1404 #define divm_shift(p) ((p)->params->div_nmp->divm_shift) macro
1408 #define divm_mask_shifted(p) (divm_mask(p) << divm_shift(p))
1567 .divm_shift = 0,
1689 .divm_shift = 0,
1735 .divm_shift = 0,
1804 .divm_shift = 0,
1881 .divm_shift = 0,
1956 .divm_shift = 0,
1993 .divm_shift = 0,
2026 .divm_shift = 0,
[all …]
Dclk.h201 u8 divm_shift; member
Dclk-tegra30.c373 .divm_shift = 0,