| /linux-6.12.1/drivers/pwm/ |
| D | pwm-mtk-disp.c | 32 unsigned int con0; member
144 mtk_disp_pwm_update_bits(mdp, mdp->data->con0, in mtk_disp_pwm_apply()
149 mtk_disp_pwm_update_bits(mdp, mdp->data->con0, in mtk_disp_pwm_apply()
178 u32 clk_div, pwm_en, con0, con1; in mtk_disp_pwm_get_state() local
205 con0 = readl(mdp->base + mdp->data->con0); in mtk_disp_pwm_get_state()
209 clk_div = FIELD_GET(PWM_CLKDIV_MASK, con0); in mtk_disp_pwm_get_state()
269 .con0 = 0xa8,
279 .con0 = 0x10,
289 .con0 = 0x18,
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| /linux-6.12.1/drivers/clk/samsung/ |
| D | clk-pll.c | 669 u32 con0, con1; in samsung_pll45xx_set_rate() local
679 con0 = readl_relaxed(pll->con_reg); in samsung_pll45xx_set_rate()
682 if (!(samsung_pll45xx_mp_change(con0, con1, rate))) { in samsung_pll45xx_set_rate()
684 con0 &= ~(PLL45XX_SDIV_MASK << PLL45XX_SDIV_SHIFT); in samsung_pll45xx_set_rate()
685 con0 |= rate->sdiv << PLL45XX_SDIV_SHIFT; in samsung_pll45xx_set_rate()
686 writel_relaxed(con0, pll->con_reg); in samsung_pll45xx_set_rate()
692 con0 &= ~((PLL45XX_MDIV_MASK << PLL45XX_MDIV_SHIFT) | in samsung_pll45xx_set_rate()
695 con0 |= (rate->mdiv << PLL45XX_MDIV_SHIFT) | in samsung_pll45xx_set_rate()
718 writel_relaxed(con0, pll->con_reg); in samsung_pll45xx_set_rate()
806 u32 con0, con1, lock; in samsung_pll46xx_set_rate() local
[all …]
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| /linux-6.12.1/sound/soc/mediatek/mt8365/ |
| D | mt8365-afe-common.h | 271 unsigned int con0; member
312 unsigned int con0; member
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| D | mt8365-afe-pcm.c | 257 .con0 = AFE_CM1_CON0,
264 .con0 = AFE_CM2_CON0,
492 regmap_update_bits(afe->regmap, cm_ctrl_reg[cmNum].con0, mask, val); in mt8365_afe_configure_cm()
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| /linux-6.12.1/sound/soc/mediatek/mt8195/ |
| D | mt8195-dai-etdm.c | 90 unsigned int con0; member
201 etdm_reg->con0 = ETDM_IN1_CON0; in get_etdm_reg()
209 etdm_reg->con0 = ETDM_IN2_CON0; in get_etdm_reg()
217 etdm_reg->con0 = ETDM_OUT1_CON0; in get_etdm_reg()
225 etdm_reg->con0 = ETDM_OUT2_CON0; in get_etdm_reg()
234 etdm_reg->con0 = ETDM_OUT3_CON0; in get_etdm_reg()
1335 regmap_update_bits(afe->regmap, etdm_reg.con0, in mt8195_afe_enable_etdm()
1363 regmap_update_bits(afe->regmap, etdm_reg.con0, in mt8195_afe_disable_etdm()
1847 regmap_update_bits(afe->regmap, etdm_reg.con0, mask, val); in mtk_dai_etdm_out_configure()
2028 regmap_update_bits(afe->regmap, etdm_reg.con0, mask, val); in mtk_dai_etdm_configure()
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| /linux-6.12.1/sound/soc/mediatek/mt8188/ |
| D | mt8188-dai-etdm.c | 81 unsigned int con0; member
160 etdm_reg->con0 = ETDM_IN1_CON0; in get_etdm_reg()
168 etdm_reg->con0 = ETDM_IN2_CON0; in get_etdm_reg()
176 etdm_reg->con0 = ETDM_OUT1_CON0; in get_etdm_reg()
184 etdm_reg->con0 = ETDM_OUT2_CON0; in get_etdm_reg()
193 etdm_reg->con0 = ETDM_OUT3_CON0; in get_etdm_reg()
1838 regmap_set_bits(afe->regmap, etdm_reg.con0, ETDM_CON0_SYNC_MODE); in mt8188_etdm_sync_mode_mst()
2046 regmap_update_bits(afe->regmap, etdm_reg.con0, mask, val); in mtk_dai_etdm_out_configure()
2163 regmap_update_bits(afe->regmap, etdm_reg.con0, mask, val); in mtk_dai_etdm_configure()
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| /linux-6.12.1/drivers/video/fbdev/ |
| D | pxa168fb.h | 357 #define CFG_COS0(con0) (con0) argument
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| /linux-6.12.1/drivers/video/fbdev/mmp/hw/ |
| D | mmp_ctrl.h | 585 #define CFG_COS0(con0) (con0) argument
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| /linux-6.12.1/drivers/net/ethernet/stmicro/stmmac/ |
| D | dwmac-rk.c | 1041 u32 con0, con1; in rk3568_set_to_rgmii() local
1048 con0 = (bsp_priv->id == 1) ? RK3568_GRF_GMAC1_CON0 : in rk3568_set_to_rgmii()
1053 regmap_write(bsp_priv->grf, con0, in rk3568_set_to_rgmii()
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| /linux-6.12.1/Documentation/virt/uml/ |
| D | user_mode_linux_howto_v2.rst | 730 root=/dev/ubda con=null con0=null,fd:2 con1=fd:0,fd:1
|