669 	u32 con0, con1;  in samsung_pll45xx_set_rate()  local
679 	con0 = readl_relaxed(pll->con_reg);  in samsung_pll45xx_set_rate()
682 	if (!(samsung_pll45xx_mp_change(con0, con1, rate))) {  in samsung_pll45xx_set_rate()
684 		con0 &= ~(PLL45XX_SDIV_MASK << PLL45XX_SDIV_SHIFT);  in samsung_pll45xx_set_rate()
685 		con0 |= rate->sdiv << PLL45XX_SDIV_SHIFT;  in samsung_pll45xx_set_rate()
686 		writel_relaxed(con0, pll->con_reg);  in samsung_pll45xx_set_rate()
692 	con0 &= ~((PLL45XX_MDIV_MASK << PLL45XX_MDIV_SHIFT) |  in samsung_pll45xx_set_rate()
695 	con0 |= (rate->mdiv << PLL45XX_MDIV_SHIFT) |  in samsung_pll45xx_set_rate()
718 	writel_relaxed(con0, pll->con_reg);  in samsung_pll45xx_set_rate()
806 	u32 con0, con1, lock;  in samsung_pll46xx_set_rate()  local
816 	con0 = readl_relaxed(pll->con_reg);  in samsung_pll46xx_set_rate()
819 	if (!(samsung_pll46xx_mpk_change(con0, con1, rate))) {  in samsung_pll46xx_set_rate()
821 		con0 &= ~(PLL46XX_SDIV_MASK << PLL46XX_SDIV_SHIFT);  in samsung_pll46xx_set_rate()
822 		con0 |= rate->sdiv << PLL46XX_SDIV_SHIFT;  in samsung_pll46xx_set_rate()
823 		writel_relaxed(con0, pll->con_reg);  in samsung_pll46xx_set_rate()
836 		con0 &= ~((PLL1460X_MDIV_MASK << PLL46XX_MDIV_SHIFT) |  in samsung_pll46xx_set_rate()
840 		con0 &= ~((PLL46XX_MDIV_MASK << PLL46XX_MDIV_SHIFT) |  in samsung_pll46xx_set_rate()
844 		con0 |=	rate->vsel << PLL46XX_VSEL_SHIFT;  in samsung_pll46xx_set_rate()
847 	con0 |= (rate->mdiv << PLL46XX_MDIV_SHIFT) |  in samsung_pll46xx_set_rate()
862 	writel_relaxed(con0, pll->con_reg);  in samsung_pll46xx_set_rate()
1139 	u32 con0, con1;  in samsung_pll2650x_set_rate()  local
1149 	con0 = readl_relaxed(pll->con_reg);  in samsung_pll2650x_set_rate()
1156 	con0 &= ~((PLL2650X_M_MASK << PLL2650X_M_SHIFT) |  in samsung_pll2650x_set_rate()
1159 	con0 |= (rate->mdiv << PLL2650X_M_SHIFT) |  in samsung_pll2650x_set_rate()
1162 	con0 |= (1 << PLL2650X_PLL_ENABLE_SHIFT);  in samsung_pll2650x_set_rate()
1163 	writel_relaxed(con0, pll->con_reg);  in samsung_pll2650x_set_rate()