Searched refs:VC5_PHY_REG (Results 1 – 1 of 1) sorted by relevance
/linux-6.12.1/drivers/gpu/drm/vc4/ |
D | vc4_hdmi_regs.h | 161 #define VC5_PHY_REG(reg, offset) _VC4_REG(VC5_PHY, reg, offset) macro 275 VC5_PHY_REG(HDMI_TX_PHY_RESET_CTL, 0x000), 276 VC5_PHY_REG(HDMI_TX_PHY_POWERDOWN_CTL, 0x004), 277 VC5_PHY_REG(HDMI_TX_PHY_CTL_0, 0x008), 278 VC5_PHY_REG(HDMI_TX_PHY_CTL_1, 0x00c), 279 VC5_PHY_REG(HDMI_TX_PHY_CTL_2, 0x010), 280 VC5_PHY_REG(HDMI_TX_PHY_CTL_3, 0x014), 281 VC5_PHY_REG(HDMI_TX_PHY_PLL_CTL_0, 0x01c), 282 VC5_PHY_REG(HDMI_TX_PHY_PLL_CTL_1, 0x020), 283 VC5_PHY_REG(HDMI_TX_PHY_CLK_DIV, 0x028), [all …]
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