Searched refs:Transmit (Results 1 – 25 of 38) sorted by relevance
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106 * Transmit checksumming114 * Transmit TCP segmentation offload119 * Transmit UDP segmentation offload126 * Transmit DMA from high memory131 * Transmit scatter-gather
34 Transmit path guidelines
21 - XPS: Transmit Packet Steering452 XPS: Transmit Packet Steering455 Transmit Packet Steering is a mechanism for intelligently selecting486 in keeping the CPU overhead low. Transmit completion work is locked into
288 Transmit a CAN frame. (parameters: ``id``, ``data``)
61 Transmit and receive are set separately, but the setup is the same, using either
339 TXC (Bit 5..1) - Transmit Credits. This field contains the minimum number371 Transmit chunk credits available - This interrupt is asserted when the
15 bool "Realtek RTL8712U Transmit Aggregation code"
47 - Transmit and Receive Queues134 Transmit subsection167 Transmit subsection
41 Transmit Packet Steering packet processing flow for this51 into the Transmit Packet Steering packet processing flow for this
8 dai-tdm-slot-tx-mask : Transmit direction slot mask, optional
17 Transmit Interrupt
133 Transmit performance:157 b. Ensure Transmit Checksum offload is enabled. Use ethtool to set/verify this
91 bool "Transmit on Demand support"
203 Transmit processing
55 8 BASE_PHY_TX_CLK Base clock for Ethernet PHY Transmit clock
30 - PDU Transmit and Recovery
351 /* SFF Transmit disable output */
21 TCP Transmit Segmentation Offload(TSO), Receive-Side Scaling(RSS) and
119 1. Transmit and receive buffer size must be a multiple of 4.
196 Transmit Messages329 Transmit a single custom pulse as soon as the CEC bus is idle.
223 eth0: Transmit error, Tx status register 82
80 4.1. Transmit process
123 + Transmit power control
185 Transmit = 0x01, enumerator
150 microseconds. Transmit interrupt reduction can improve CPU efficiency if