Searched refs:SMI_CR1 (Results 1 – 1 of 1) sorted by relevance
51 #define SMI_CR1 0x0 /* SMI control register 1 */ macro229 ctrlreg1 = readl(dev->io_base + SMI_CR1); in spear_smi_read_sr()231 writel(ctrlreg1 & ~(SW_MODE | WB_MODE), dev->io_base + SMI_CR1); in spear_smi_read_sr()248 writel(ctrlreg1, dev->io_base + SMI_CR1); in spear_smi_read_sr()345 writel(val, dev->io_base + SMI_CR1); in spear_smi_hw_init()387 ctrlreg1 = readl(dev->io_base + SMI_CR1); in spear_smi_write_enable()389 writel(ctrlreg1 & ~SW_MODE, dev->io_base + SMI_CR1); in spear_smi_write_enable()398 writel(ctrlreg1, dev->io_base + SMI_CR1); in spear_smi_write_enable()460 ctrlreg1 = readl(dev->io_base + SMI_CR1); in spear_smi_erase_sector()461 writel((ctrlreg1 | SW_MODE) & ~WB_MODE, dev->io_base + SMI_CR1); in spear_smi_erase_sector()[all …]