1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Driver for Epson RX8111 RTC.
4 *
5 * Copyright (C) 2023 Axis Communications AB
6 */
7
8 #include <linux/bcd.h>
9 #include <linux/bitfield.h>
10 #include <linux/i2c.h>
11 #include <linux/module.h>
12 #include <linux/regmap.h>
13
14 #include <linux/rtc.h>
15
16 #define RX8111_REG_SEC 0x10 /* Second counter. */
17 #define RX8111_REG_MIN 0x11 /* Minute counter */
18 #define RX8111_REG_HOUR 0x12 /* Hour counter. */
19 #define RX8111_REG_WEEK 0x13 /* Week day counter. */
20 #define RX8111_REG_DAY 0x14 /* Month day counter. */
21 #define RX8111_REG_MONTH 0x15 /* Month counter. */
22 #define RX8111_REG_YEAR 0x16 /* Year counter. */
23
24 #define RX8111_REG_ALARM_MIN 0x17 /* Alarm minute. */
25 #define RX8111_REG_ALARM_HOUR 0x18 /* Alarm hour. */
26 #define RX8111_REG_ALARM_WEEK_DAY 0x19 /* Alarm week or month day. */
27
28 #define RX8111_REG_TIMER_COUNTER0 0x1a /* Timer counter LSB. */
29 #define RX8111_REG_TIMER_COUNTER1 0x1b /* Timer counter. */
30 #define RX8111_REG_TIMER_COUNTER2 0x1c /* Timer counter MSB. */
31
32 #define RX8111_REG_EXT 0x1d /* Extension register. */
33 #define RX8111_REG_FLAG 0x1e /* Flag register. */
34 #define RX8111_REG_CTRL 0x1f /* Control register. */
35
36 #define RX8111_REG_TS_1_1000_SEC 0x20 /* Timestamp 256 or 512 Hz . */
37 #define RX8111_REG_TS_1_100_SEC 0x21 /* Timestamp 1 - 128 Hz. */
38 #define RX8111_REG_TS_SEC 0x22 /* Timestamp second. */
39 #define RX8111_REG_TS_MIN 0x23 /* Timestamp minute. */
40 #define RX8111_REG_TS_HOUR 0x24 /* Timestamp hour. */
41 #define RX8111_REG_TS_WEEK 0x25 /* Timestamp week day. */
42 #define RX8111_REG_TS_DAY 0x26 /* Timestamp month day. */
43 #define RX8111_REG_TS_MONTH 0x27 /* Timestamp month. */
44 #define RX8111_REG_TS_YEAR 0x28 /* Timestamp year. */
45 #define RX8111_REG_TS_STATUS 0x29 /* Timestamp status. */
46
47 #define RX8111_REG_EVIN_SETTING 0x2b /* Timestamp trigger setting. */
48 #define RX8111_REG_ALARM_SEC 0x2c /* Alarm second. */
49 #define RX8111_REG_TIMER_CTRL 0x2d /* Timer control. */
50 #define RX8111_REG_TS_CTRL0 0x2e /* Timestamp control 0. */
51 #define RX8111_REG_CMD_TRIGGER 0x2f /* Timestamp trigger. */
52 #define RX8111_REG_PWR_SWITCH_CTRL 0x32 /* Power switch control. */
53 #define RX8111_REG_STATUS_MON 0x33 /* Status monitor. */
54 #define RX8111_REG_TS_CTRL1 0x34 /* Timestamp control 1. */
55 #define RX8111_REG_TS_CTRL2 0x35 /* Timestamp control 2. */
56 #define RX8111_REG_TS_CTRL3 0x36 /* Timestamp control 3. */
57
58 #define RX8111_FLAG_XST_BIT BIT(0)
59 #define RX8111_FLAG_VLF_BIT BIT(1)
60
61 #define RX8111_TIME_BUF_SZ (RX8111_REG_YEAR - RX8111_REG_SEC + 1)
62
63 enum rx8111_regfield {
64 /* RX8111_REG_EXT. */
65 RX8111_REGF_TSEL0,
66 RX8111_REGF_TSEL1,
67 RX8111_REGF_ETS,
68 RX8111_REGF_WADA,
69 RX8111_REGF_TE,
70 RX8111_REGF_USEL,
71 RX8111_REGF_FSEL0,
72 RX8111_REGF_FSEL1,
73
74 /* RX8111_REG_FLAG. */
75 RX8111_REGF_XST,
76 RX8111_REGF_VLF,
77 RX8111_REGF_EVF,
78 RX8111_REGF_AF,
79 RX8111_REGF_TF,
80 RX8111_REGF_UF,
81 RX8111_REGF_POR,
82
83 /* RX8111_REG_CTRL. */
84 RX8111_REGF_STOP,
85 RX8111_REGF_EIE,
86 RX8111_REGF_AIE,
87 RX8111_REGF_TIE,
88 RX8111_REGF_UIE,
89
90 /* RX8111_REG_PWR_SWITCH_CTRL. */
91 RX8111_REGF_SMPT0,
92 RX8111_REGF_SMPT1,
93 RX8111_REGF_SWSEL0,
94 RX8111_REGF_SWSEL1,
95 RX8111_REGF_INIEN,
96 RX8111_REGF_CHGEN,
97
98 /* RX8111_REG_STATUS_MON. */
99 RX8111_REGF_VLOW,
100
101 /* Sentinel value. */
102 RX8111_REGF_MAX
103 };
104
105 static const struct reg_field rx8111_regfields[] = {
106 [RX8111_REGF_TSEL0] = REG_FIELD(RX8111_REG_EXT, 0, 0),
107 [RX8111_REGF_TSEL1] = REG_FIELD(RX8111_REG_EXT, 1, 1),
108 [RX8111_REGF_ETS] = REG_FIELD(RX8111_REG_EXT, 2, 2),
109 [RX8111_REGF_WADA] = REG_FIELD(RX8111_REG_EXT, 3, 3),
110 [RX8111_REGF_TE] = REG_FIELD(RX8111_REG_EXT, 4, 4),
111 [RX8111_REGF_USEL] = REG_FIELD(RX8111_REG_EXT, 5, 5),
112 [RX8111_REGF_FSEL0] = REG_FIELD(RX8111_REG_EXT, 6, 6),
113 [RX8111_REGF_FSEL1] = REG_FIELD(RX8111_REG_EXT, 7, 7),
114
115 [RX8111_REGF_XST] = REG_FIELD(RX8111_REG_FLAG, 0, 0),
116 [RX8111_REGF_VLF] = REG_FIELD(RX8111_REG_FLAG, 1, 1),
117 [RX8111_REGF_EVF] = REG_FIELD(RX8111_REG_FLAG, 2, 2),
118 [RX8111_REGF_AF] = REG_FIELD(RX8111_REG_FLAG, 3, 3),
119 [RX8111_REGF_TF] = REG_FIELD(RX8111_REG_FLAG, 4, 4),
120 [RX8111_REGF_UF] = REG_FIELD(RX8111_REG_FLAG, 5, 5),
121 [RX8111_REGF_POR] = REG_FIELD(RX8111_REG_FLAG, 7, 7),
122
123 [RX8111_REGF_STOP] = REG_FIELD(RX8111_REG_CTRL, 0, 0),
124 [RX8111_REGF_EIE] = REG_FIELD(RX8111_REG_CTRL, 2, 2),
125 [RX8111_REGF_AIE] = REG_FIELD(RX8111_REG_CTRL, 3, 3),
126 [RX8111_REGF_TIE] = REG_FIELD(RX8111_REG_CTRL, 4, 4),
127 [RX8111_REGF_UIE] = REG_FIELD(RX8111_REG_CTRL, 5, 5),
128
129 [RX8111_REGF_SMPT0] = REG_FIELD(RX8111_REG_PWR_SWITCH_CTRL, 0, 0),
130 [RX8111_REGF_SMPT1] = REG_FIELD(RX8111_REG_PWR_SWITCH_CTRL, 1, 1),
131 [RX8111_REGF_SWSEL0] = REG_FIELD(RX8111_REG_PWR_SWITCH_CTRL, 2, 2),
132 [RX8111_REGF_SWSEL1] = REG_FIELD(RX8111_REG_PWR_SWITCH_CTRL, 3, 3),
133 [RX8111_REGF_INIEN] = REG_FIELD(RX8111_REG_PWR_SWITCH_CTRL, 6, 6),
134 [RX8111_REGF_CHGEN] = REG_FIELD(RX8111_REG_PWR_SWITCH_CTRL, 7, 7),
135
136 [RX8111_REGF_VLOW] = REG_FIELD(RX8111_REG_STATUS_MON, 1, 1),
137 };
138
139 static const struct regmap_config rx8111_regmap_config = {
140 .reg_bits = 8,
141 .val_bits = 8,
142 .max_register = RX8111_REG_TS_CTRL3,
143 };
144
145 struct rx8111_data {
146 struct regmap *regmap;
147 struct regmap_field *regfields[RX8111_REGF_MAX];
148 struct device *dev;
149 struct rtc_device *rtc;
150 };
151
rx8111_read_vl_flag(struct rx8111_data * data,unsigned int * vlval)152 static int rx8111_read_vl_flag(struct rx8111_data *data, unsigned int *vlval)
153 {
154 int ret;
155
156 ret = regmap_field_read(data->regfields[RX8111_REGF_VLF], vlval);
157 if (ret)
158 dev_dbg(data->dev, "Could not read VL flag (%d)", ret);
159
160 return ret;
161 }
162
rx8111_read_time(struct device * dev,struct rtc_time * tm)163 static int rx8111_read_time(struct device *dev, struct rtc_time *tm)
164 {
165 struct rx8111_data *data = dev_get_drvdata(dev);
166 u8 buf[RX8111_TIME_BUF_SZ];
167 unsigned int regval;
168 int ret;
169
170 /* Check status. */
171 ret = regmap_read(data->regmap, RX8111_REG_FLAG, ®val);
172 if (ret) {
173 dev_dbg(data->dev, "Could not read flag register (%d)\n", ret);
174 return ret;
175 }
176
177 if (FIELD_GET(RX8111_FLAG_XST_BIT, regval)) {
178 dev_dbg(data->dev,
179 "Crystal oscillation stopped, time is not reliable\n");
180 return -EINVAL;
181 }
182
183 if (FIELD_GET(RX8111_FLAG_VLF_BIT, regval)) {
184 dev_dbg(data->dev,
185 "Low voltage detected, time is not reliable\n");
186 return -EINVAL;
187 }
188
189 ret = regmap_field_read(data->regfields[RX8111_REGF_STOP], ®val);
190 if (ret) {
191 dev_dbg(data->dev, "Could not read clock status (%d)\n", ret);
192 return ret;
193 }
194
195 if (regval) {
196 dev_dbg(data->dev, "Clock stopped, time is not reliable\n");
197 return -EINVAL;
198 }
199
200 /* Read time. */
201 ret = regmap_bulk_read(data->regmap, RX8111_REG_SEC, buf,
202 ARRAY_SIZE(buf));
203 if (ret) {
204 dev_dbg(data->dev, "Could not bulk read time (%d)\n", ret);
205 return ret;
206 }
207
208 tm->tm_sec = bcd2bin(buf[0]);
209 tm->tm_min = bcd2bin(buf[1]);
210 tm->tm_hour = bcd2bin(buf[2]);
211 tm->tm_wday = ffs(buf[3]) - 1;
212 tm->tm_mday = bcd2bin(buf[4]);
213 tm->tm_mon = bcd2bin(buf[5]) - 1;
214 tm->tm_year = bcd2bin(buf[6]) + 100;
215
216 return 0;
217 }
218
rx8111_set_time(struct device * dev,struct rtc_time * tm)219 static int rx8111_set_time(struct device *dev, struct rtc_time *tm)
220 {
221 struct rx8111_data *data = dev_get_drvdata(dev);
222 u8 buf[RX8111_TIME_BUF_SZ];
223 int ret;
224
225 buf[0] = bin2bcd(tm->tm_sec);
226 buf[1] = bin2bcd(tm->tm_min);
227 buf[2] = bin2bcd(tm->tm_hour);
228 buf[3] = BIT(tm->tm_wday);
229 buf[4] = bin2bcd(tm->tm_mday);
230 buf[5] = bin2bcd(tm->tm_mon + 1);
231 buf[6] = bin2bcd(tm->tm_year - 100);
232
233 ret = regmap_clear_bits(data->regmap, RX8111_REG_FLAG,
234 RX8111_FLAG_XST_BIT | RX8111_FLAG_VLF_BIT);
235 if (ret)
236 return ret;
237
238 /* Stop the clock. */
239 ret = regmap_field_write(data->regfields[RX8111_REGF_STOP], 1);
240 if (ret) {
241 dev_dbg(data->dev, "Could not stop the clock (%d)\n", ret);
242 return ret;
243 }
244
245 /* Set the time. */
246 ret = regmap_bulk_write(data->regmap, RX8111_REG_SEC, buf,
247 ARRAY_SIZE(buf));
248 if (ret) {
249 dev_dbg(data->dev, "Could not bulk write time (%d)\n", ret);
250
251 /*
252 * We don't bother with trying to start the clock again. We
253 * check for this in rx8111_read_time() (and thus force user to
254 * call rx8111_set_time() to try again).
255 */
256 return ret;
257 }
258
259 /* Start the clock. */
260 ret = regmap_field_write(data->regfields[RX8111_REGF_STOP], 0);
261 if (ret) {
262 dev_dbg(data->dev, "Could not start the clock (%d)\n", ret);
263 return ret;
264 }
265
266 return 0;
267 }
268
rx8111_ioctl(struct device * dev,unsigned int cmd,unsigned long arg)269 static int rx8111_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
270 {
271 struct rx8111_data *data = dev_get_drvdata(dev);
272 unsigned int regval;
273 unsigned int vlval;
274 int ret;
275
276 switch (cmd) {
277 case RTC_VL_READ:
278 ret = rx8111_read_vl_flag(data, ®val);
279 if (ret)
280 return ret;
281
282 vlval = regval ? RTC_VL_DATA_INVALID : 0;
283
284 ret = regmap_field_read(data->regfields[RX8111_REGF_VLOW],
285 ®val);
286 if (ret)
287 return ret;
288
289 vlval |= regval ? RTC_VL_BACKUP_LOW : 0;
290
291 return put_user(vlval, (typeof(vlval) __user *)arg);
292 default:
293 return -ENOIOCTLCMD;
294 }
295 }
296
297 static const struct rtc_class_ops rx8111_rtc_ops = {
298 .read_time = rx8111_read_time,
299 .set_time = rx8111_set_time,
300 .ioctl = rx8111_ioctl,
301 };
302
rx8111_probe(struct i2c_client * client)303 static int rx8111_probe(struct i2c_client *client)
304 {
305 struct rx8111_data *data;
306 struct rtc_device *rtc;
307 size_t i;
308
309 data = devm_kmalloc(&client->dev, sizeof(*data), GFP_KERNEL);
310 if (!data) {
311 dev_dbg(&client->dev, "Could not allocate device data\n");
312 return -ENOMEM;
313 }
314
315 data->dev = &client->dev;
316 dev_set_drvdata(data->dev, data);
317
318 data->regmap = devm_regmap_init_i2c(client, &rx8111_regmap_config);
319 if (IS_ERR(data->regmap)) {
320 dev_dbg(data->dev, "Could not initialize regmap\n");
321 return PTR_ERR(data->regmap);
322 }
323
324 for (i = 0; i < RX8111_REGF_MAX; ++i) {
325 data->regfields[i] = devm_regmap_field_alloc(
326 data->dev, data->regmap, rx8111_regfields[i]);
327 if (IS_ERR(data->regfields[i])) {
328 dev_dbg(data->dev,
329 "Could not allocate register field %zu\n", i);
330 return PTR_ERR(data->regfields[i]);
331 }
332 }
333
334 rtc = devm_rtc_allocate_device(data->dev);
335 if (IS_ERR(rtc)) {
336 dev_dbg(data->dev, "Could not allocate rtc device\n");
337 return PTR_ERR(rtc);
338 }
339
340 rtc->ops = &rx8111_rtc_ops;
341 rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
342 rtc->range_max = RTC_TIMESTAMP_END_2099;
343
344 clear_bit(RTC_FEATURE_ALARM, rtc->features);
345
346 return devm_rtc_register_device(rtc);
347 }
348
349 static const struct of_device_id rx8111_of_match[] = {
350 {
351 .compatible = "epson,rx8111",
352 },
353 {}
354 };
355 MODULE_DEVICE_TABLE(of, rx8111_of_match);
356
357 static struct i2c_driver rx8111_driver = {
358 .driver = {
359 .name = "rtc-rx8111",
360 .of_match_table = rx8111_of_match,
361 },
362 .probe = rx8111_probe,
363 };
364 module_i2c_driver(rx8111_driver);
365
366 MODULE_AUTHOR("Waqar Hameed <waqar.hameed@axis.com>");
367 MODULE_DESCRIPTION("Epson RX8111 RTC driver");
368 MODULE_LICENSE("GPL");
369