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Searched refs:RPTR_REARM (Results 1 – 18 of 18) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Dsi_ih.c92 ih_cntl |= RPTR_REARM; in si_ih_irq_init()
Dcz_ih.c152 ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL, RPTR_REARM, 1); in cz_ih_irq_init()
Diceland_ih.c152 ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL, RPTR_REARM, 1); in iceland_ih_irq_init()
Dtonga_ih.c133 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RPTR_REARM, 1); in tonga_ih_irq_init()
Dvega10_ih.c223 tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, RPTR_REARM, !!adev->irq.msi_enabled); in vega10_ih_enable_ring()
Dnavi10_ih.c278 tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, RPTR_REARM, !!adev->irq.msi_enabled); in navi10_ih_enable_ring()
Dvega20_ih.c232 tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, RPTR_REARM, !!adev->irq.msi_enabled); in vega20_ih_enable_ring()
Dih_v7_0.c252 tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, RPTR_REARM, !!adev->irq.msi_enabled); in ih_v7_0_enable_ring()
Dih_v6_0.c280 tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, RPTR_REARM, !!adev->irq.msi_enabled); in ih_v6_0_enable_ring()
Dih_v6_1.c252 tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, RPTR_REARM, !!adev->irq.msi_enabled); in ih_v6_1_enable_ring()
Dsid.h676 # define RPTR_REARM (1 << 4) macro
/linux-6.12.1/drivers/gpu/drm/radeon/
Dsid.h673 # define RPTR_REARM (1 << 4) macro
Dcikd.h823 # define RPTR_REARM (1 << 4) macro
Devergreend.h1242 # define RPTR_REARM (1 << 4) macro
Dr600d.h681 # define RPTR_REARM (1 << 4) macro
Dr600.c3731 ih_cntl |= RPTR_REARM; in r600_irq_init()
Dsi.c6015 ih_cntl |= RPTR_REARM; in si_irq_init()
Dcik.c6992 ih_cntl |= RPTR_REARM; in cik_irq_init()