Searched refs:NCR5380_read (Results 1 – 9 of 9) sorted by relevance
214 if ((NCR5380_read(reg1) & bit1) == val1) in NCR5380_poll_politely2()216 if ((NCR5380_read(reg2) & bit2) == val2) in NCR5380_poll_politely2()227 if ((NCR5380_read(reg1) & bit1) == val1) in NCR5380_poll_politely2()229 if ((NCR5380_read(reg2) & bit2) == val2) in NCR5380_poll_politely2()297 status = NCR5380_read(STATUS_REG); in NCR5380_print()298 mr = NCR5380_read(MODE_REG); in NCR5380_print()299 icr = NCR5380_read(INITIATOR_COMMAND_REG); in NCR5380_print()300 basr = NCR5380_read(BUS_AND_STATUS_REG); in NCR5380_print()347 status = NCR5380_read(STATUS_REG); in NCR5380_print_phase()444 NCR5380_read(STATUS_REG); in NCR5380_init()[all …]
38 #define NCR5380_read(reg) \ macro129 PHASE_SR_TO_TCR(NCR5380_read(STATUS_REG) & PHASE_MASK)); in g_NCR5380_trigger_irq()155 NCR5380_read(RESET_PARITY_INTERRUPT_REG); in g_NCR5380_probe_irq()159 NCR5380_read(RESET_PARITY_INTERRUPT_REG); in g_NCR5380_probe_irq()372 if (NCR5380_read(MODE_REG) != 0) { in generic_NCR5380_init_one()501 if (NCR5380_read(hostdata->c400_ctl_status) & CSR_53C80_REG) in wait_for_53c80_access()541 NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY) in generic_NCR5380_precv()602 NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY) { in generic_NCR5380_psend()611 if (start >= len && NCR5380_read(hostdata->c400_blk_cnt) == 0) in generic_NCR5380_psend()614 if (NCR5380_read(hostdata->c400_ctl_status) & CSR_GATED_53C80_IRQ) { in generic_NCR5380_psend()
38 #define NCR5380_read(reg) in_8(hostdata->io + ((reg) << 4)) macro284 basr = NCR5380_read(BUS_AND_STATUS_REG); in macscsi_wait_for_drq()
25 #define NCR5380_read(reg) inb(hostdata->base + (reg)) macro
299 if ((NCR5380_read(reg) & bit) == val) in NCR5380_poll_politely()
46 #define NCR5380_read(reg) in_8(hostdata->io + (reg)) macro
63 #define NCR5380_read(reg) atari_scsi_reg_read(reg) macro
20 #define NCR5380_read(reg) readb(hostdata->io + ((reg) << 2)) macro
18 #define NCR5380_read(reg) cumanascsi_read(hostdata, reg) macro