Searched refs:IMX8MM_SYS_PLL2_50M (Results 1 – 18 of 18) sorted by relevance
/linux-6.12.1/include/dt-bindings/clock/ |
D | imx8mm-clock.h | 66 #define IMX8MM_SYS_PLL2_50M 57 macro
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/linux-6.12.1/arch/arm64/boot/dts/freescale/ |
D | imx8mm-venice-gw71xx.dtsi | 122 assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
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D | imx8mm-tqma8mqml-mba8mx.dts | 94 assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
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D | imx8mm-venice-gw72xx.dtsi | 156 assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
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D | imx8mm-venice-gw73xx.dtsi | 176 assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
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D | imx8mm-phygate-tauri-l.dts | 179 assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
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D | imx8mm-innocomm-wb15.dtsi | 216 assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>, <&clk IMX8MM_SYS_PLL2_250M>;
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D | imx8mm-beacon-baseboard.dtsi | 310 assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
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D | imx8mm-phyboard-polis-rdk.dts | 204 assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
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D | imx8mm-venice-gw7904.dts | 627 assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
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D | imx8mm-evk.dtsi | 541 assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
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D | imx8mm-venice-gw7903.dts | 566 assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
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D | imx8mm-venice-gw7902.dts | 632 assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
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D | imx8mm-data-modul-edm-sbc.dts | 928 assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
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D | imx8mm-venice-gw7901.dts | 733 assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
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D | imx8mm-verdin.dtsi | 671 assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
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D | imx8mm.dtsi | 1104 <&clk IMX8MM_SYS_PLL2_50M>;
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/linux-6.12.1/drivers/clk/imx/ |
D | clk-imx8mm.c | 383 hws[IMX8MM_SYS_PLL2_50M] = imx_clk_hw_fixed_factor("sys_pll2_50m", "sys_pll2_out", 1, 20); in imx8mm_clocks_probe()
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