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Searched refs:IH_RB_WPTR (Results 1 – 19 of 19) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Dcz_ih.c197 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in cz_ih_get_wptr()
203 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in cz_ih_get_wptr()
206 wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0); in cz_ih_get_wptr()
Diceland_ih.c197 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in iceland_ih_get_wptr()
203 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in iceland_ih_get_wptr()
206 wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0); in iceland_ih_get_wptr()
Dtonga_ih.c199 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in tonga_ih_get_wptr()
205 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in tonga_ih_get_wptr()
208 wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0); in tonga_ih_get_wptr()
Dsi_ih.c57 WREG32(IH_RB_WPTR, 0); in si_ih_disable_interrupts()
88 WREG32(IH_RB_WPTR, 0); in si_ih_irq_init()
Dvega10_ih.c349 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in vega10_ih_get_wptr()
357 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in vega10_ih_get_wptr()
360 wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0); in vega10_ih_get_wptr()
Dnavi10_ih.c420 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in navi10_ih_get_wptr()
428 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in navi10_ih_get_wptr()
430 wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0); in navi10_ih_get_wptr()
Dvega20_ih.c401 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in vega20_ih_get_wptr()
409 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in vega20_ih_get_wptr()
412 wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0); in vega20_ih_get_wptr()
Dih_v7_0.c415 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in ih_v7_0_get_wptr()
419 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in ih_v7_0_get_wptr()
421 wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0); in ih_v7_0_get_wptr()
Dih_v6_0.c443 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in ih_v6_0_get_wptr()
447 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in ih_v6_0_get_wptr()
449 wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0); in ih_v6_0_get_wptr()
Dih_v6_1.c415 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in ih_v6_1_get_wptr()
419 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in ih_v6_1_get_wptr()
421 wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0); in ih_v6_1_get_wptr()
Dsid.h664 #define IH_RB_WPTR 0xF83 macro
/linux-6.12.1/drivers/gpu/drm/radeon/
Dr600.c3613 WREG32(IH_RB_WPTR, 0); in r600_disable_interrupts()
3725 WREG32(IH_RB_WPTR, 0); in r600_irq_init()
4044 wptr = RREG32(IH_RB_WPTR); in r600_get_ih_wptr()
4107 RREG32(IH_RB_WPTR); in r600_irq_process()
Dsid.h661 #define IH_RB_WPTR 0x3e0c macro
Dcikd.h811 #define IH_RB_WPTR 0x3e0c macro
Dsi.c5923 WREG32(IH_RB_WPTR, 0); in si_disable_interrupts()
6009 WREG32(IH_RB_WPTR, 0); in si_irq_init()
6197 wptr = RREG32(IH_RB_WPTR); in si_get_ih_wptr()
Devergreend.h1230 #define IH_RB_WPTR 0x3e0c macro
Dr600d.h669 #define IH_RB_WPTR 0x3e0c macro
Dcik.c6842 WREG32(IH_RB_WPTR, 0); in cik_disable_interrupts()
6986 WREG32(IH_RB_WPTR, 0); in cik_irq_init()
7488 wptr = RREG32(IH_RB_WPTR); in cik_get_ih_wptr()
Devergreen.c4682 wptr = RREG32(IH_RB_WPTR); in evergreen_get_ih_wptr()