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Searched refs:GCC_AGGRE_UFS_PHY_AXI_CLK (Results 1 – 25 of 46) sorted by relevance

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/linux-6.12.1/include/dt-bindings/clock/
Dqcom,gcc-sc7180.h17 #define GCC_AGGRE_UFS_PHY_AXI_CLK 7 macro
Dqcom,gcc-sm6350.h22 #define GCC_AGGRE_UFS_PHY_AXI_CLK 11 macro
Dqcom,sm7150-gcc.h18 #define GCC_AGGRE_UFS_PHY_AXI_CLK 6 macro
Dqcom,sm4450-gcc.h11 #define GCC_AGGRE_UFS_PHY_AXI_CLK 1 macro
Dqcom,gcc-sc7280.h19 #define GCC_AGGRE_UFS_PHY_AXI_CLK 9 macro
Dqcom,gcc-sm8450.h22 #define GCC_AGGRE_UFS_PHY_AXI_CLK 10 macro
Dqcom,sm8550-gcc.h12 #define GCC_AGGRE_UFS_PHY_AXI_CLK 1 macro
Dqcom,gcc-sm8150.h13 #define GCC_AGGRE_UFS_PHY_AXI_CLK 3 macro
Dqcom,gcc-sdm845.h12 #define GCC_AGGRE_UFS_PHY_AXI_CLK 2 macro
Dqcom,sm8650-gcc.h12 #define GCC_AGGRE_UFS_PHY_AXI_CLK 1 macro
Dqcom,gcc-sm8350.h28 #define GCC_AGGRE_UFS_PHY_AXI_CLK 16 macro
Dqcom,gcc-sm8250.h16 #define GCC_AGGRE_UFS_PHY_AXI_CLK 6 macro
Dqcom,gcc-sc8180x.h13 #define GCC_AGGRE_UFS_PHY_AXI_CLK 3 macro
Dqcom,sa8775p-gcc.h20 #define GCC_AGGRE_UFS_PHY_AXI_CLK 9 macro
Dqcom,gcc-sc8280xp.h23 #define GCC_AGGRE_UFS_PHY_AXI_CLK 12 macro
Dqcom,x1e80100-gcc.h12 #define GCC_AGGRE_UFS_PHY_AXI_CLK 2 macro
/linux-6.12.1/drivers/clk/qcom/
Dgcc-sdm845.c3528 [GCC_AGGRE_UFS_PHY_AXI_CLK] = &gcc_aggre_ufs_phy_axi_clk.clkr,
3679 [GCC_AGGRE_UFS_PHY_AXI_CLK] = &gcc_aggre_ufs_phy_axi_clk.clkr,
Dgcc-sc7180.c2247 [GCC_AGGRE_UFS_PHY_AXI_CLK] = &gcc_aggre_ufs_phy_axi_clk.clkr,
Dgcc-sm6350.c2350 [GCC_AGGRE_UFS_PHY_AXI_CLK] = &gcc_aggre_ufs_phy_axi_clk.clkr,
Dgcc-sm4450.c2615 [GCC_AGGRE_UFS_PHY_AXI_CLK] = &gcc_aggre_ufs_phy_axi_clk.clkr,
Dgcc-sm7150.c2757 [GCC_AGGRE_UFS_PHY_AXI_CLK] = &gcc_aggre_ufs_phy_axi_clk.clkr,
Dgcc-sm8450.c3007 [GCC_AGGRE_UFS_PHY_AXI_CLK] = &gcc_aggre_ufs_phy_axi_clk.clkr,
Dgcc-sm8550.c3081 [GCC_AGGRE_UFS_PHY_AXI_CLK] = &gcc_aggre_ufs_phy_axi_clk.clkr,
/linux-6.12.1/arch/arm64/boot/dts/qcom/
Dsm8450.dtsi2129 clocks = <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
2141 <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
4502 <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
Dsdm670.dtsi641 <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>;

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