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Searched refs:DISP_CC_MDSS_PCLK1_CLK (Results 1 – 24 of 24) sorted by relevance

/linux-6.12.1/include/dt-bindings/clock/
Dqcom,dispcc-sdm845.h27 #define DISP_CC_MDSS_PCLK1_CLK 17 macro
Dqcom,dispcc-sm8150.h48 #define DISP_CC_MDSS_PCLK1_CLK 38 macro
Dqcom,dispcc-sm8350.h48 #define DISP_CC_MDSS_PCLK1_CLK 38 macro
Dqcom,dispcc-sm8250.h48 #define DISP_CC_MDSS_PCLK1_CLK 38 macro
Dqcom,dispcc-sc8280xp.h77 #define DISP_CC_MDSS_PCLK1_CLK 67 macro
Dqcom,x1e80100-dispcc.h75 #define DISP_CC_MDSS_PCLK1_CLK 65 macro
Dqcom,sm8550-dispcc.h78 #define DISP_CC_MDSS_PCLK1_CLK 68 macro
Dqcom,sm8650-dispcc.h78 #define DISP_CC_MDSS_PCLK1_CLK 68 macro
Dqcom,sm8450-dispcc.h77 #define DISP_CC_MDSS_PCLK1_CLK 67 macro
/linux-6.12.1/drivers/clk/qcom/
Ddispcc-sdm845.c806 [DISP_CC_MDSS_PCLK1_CLK] = &disp_cc_mdss_pclk1_clk.clkr,
Ddispcc-sm8250.c1207 [DISP_CC_MDSS_PCLK1_CLK] = &disp_cc_mdss_pclk1_clk.clkr,
Ddispcc-sc8280xp.c2946 [DISP_CC_MDSS_PCLK1_CLK] = &disp0_cc_mdss_pclk1_clk.clkr,
3028 [DISP_CC_MDSS_PCLK1_CLK] = &disp1_cc_mdss_pclk1_clk.clkr,
Ddispcc-x1e80100.c1606 [DISP_CC_MDSS_PCLK1_CLK] = &disp_cc_mdss_pclk1_clk.clkr,
Ddispcc-sm8450.c1701 [DISP_CC_MDSS_PCLK1_CLK] = &disp_cc_mdss_pclk1_clk.clkr,
Ddispcc-sm8550.c1709 [DISP_CC_MDSS_PCLK1_CLK] = &disp_cc_mdss_pclk1_clk.clkr,
/linux-6.12.1/arch/arm64/boot/dts/qcom/
Dsdm670.dtsi1581 <&dispcc DISP_CC_MDSS_PCLK1_CLK>,
Dsc8180x.dtsi3159 <&dispcc DISP_CC_MDSS_PCLK1_CLK>,
Dsm8350.dtsi2800 <&dispcc DISP_CC_MDSS_PCLK1_CLK>,
Dsm8150.dtsi4060 <&dispcc DISP_CC_MDSS_PCLK1_CLK>,
Dsm8450.dtsi3350 <&dispcc DISP_CC_MDSS_PCLK1_CLK>,
Dsdm845.dtsi4769 <&dispcc DISP_CC_MDSS_PCLK1_CLK>,
Dsm8550.dtsi3150 <&dispcc DISP_CC_MDSS_PCLK1_CLK>,
Dsm8650.dtsi3664 <&dispcc DISP_CC_MDSS_PCLK1_CLK>,
Dsm8250.dtsi4941 <&dispcc DISP_CC_MDSS_PCLK1_CLK>,