Searched refs:DISP_CC_MDSS_BYTE1_CLK_SRC (Results 1 – 23 of 23) sorted by relevance
| /linux-6.12.1/include/dt-bindings/clock/ |
| D | qcom,dispcc-sdm845.h | 16 #define DISP_CC_MDSS_BYTE1_CLK_SRC 6 macro
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| D | qcom,dispcc-sm8150.h | 17 #define DISP_CC_MDSS_BYTE1_CLK_SRC 7 macro
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| D | qcom,dispcc-sm8350.h | 17 #define DISP_CC_MDSS_BYTE1_CLK_SRC 7 macro
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| D | qcom,dispcc-sm8250.h | 17 #define DISP_CC_MDSS_BYTE1_CLK_SRC 7 macro
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| D | qcom,dispcc-sc8280xp.h | 22 #define DISP_CC_MDSS_BYTE1_CLK_SRC 12 macro
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| D | qcom,x1e80100-dispcc.h | 19 #define DISP_CC_MDSS_BYTE1_CLK_SRC 9 macro
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| D | qcom,sm8550-dispcc.h | 19 #define DISP_CC_MDSS_BYTE1_CLK_SRC 9 macro
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| D | qcom,sm8650-dispcc.h | 19 #define DISP_CC_MDSS_BYTE1_CLK_SRC 9 macro
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| D | qcom,sm8450-dispcc.h | 18 #define DISP_CC_MDSS_BYTE1_CLK_SRC 8 macro
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| /linux-6.12.1/drivers/clk/qcom/ |
| D | dispcc-sdm845.c | 780 [DISP_CC_MDSS_BYTE1_CLK_SRC] = &disp_cc_mdss_byte1_clk_src.clkr,
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| D | dispcc-sm8250.c | 1166 [DISP_CC_MDSS_BYTE1_CLK_SRC] = &disp_cc_mdss_byte1_clk_src.clkr,
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| D | dispcc-sc8280xp.c | 2891 [DISP_CC_MDSS_BYTE1_CLK_SRC] = &disp0_cc_mdss_byte1_clk_src.clkr,
2973 [DISP_CC_MDSS_BYTE1_CLK_SRC] = &disp1_cc_mdss_byte1_clk_src.clkr,
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| D | dispcc-x1e80100.c | 1547 [DISP_CC_MDSS_BYTE1_CLK_SRC] = &disp_cc_mdss_byte1_clk_src.clkr,
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| D | dispcc-sm8450.c | 1640 [DISP_CC_MDSS_BYTE1_CLK_SRC] = &disp_cc_mdss_byte1_clk_src.clkr,
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| D | dispcc-sm8550.c | 1648 [DISP_CC_MDSS_BYTE1_CLK_SRC] = &disp_cc_mdss_byte1_clk_src.clkr,
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| /linux-6.12.1/arch/arm64/boot/dts/qcom/ |
| D | sdm670.dtsi | 1591 assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>,
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| D | sm8350.dtsi | 2811 assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>,
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| D | sm8150.dtsi | 4071 assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>,
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| D | sm8450.dtsi | 3361 assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>;
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| D | sdm845.dtsi | 4779 assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>;
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| D | sm8550.dtsi | 3163 assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>,
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| D | sm8650.dtsi | 3675 assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>,
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| D | sm8250.dtsi | 4952 assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>;
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