write\-data (full) in projects: linux-6.12.1

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/linux-6.12.1/Documentation/driver-api/md/
D	raid5-cache.rst	5 Raid 4/5/6 could include an extra disk for data cache besides normal RAID 7 caches data to the RAID disks. The cache can be in write-through (supported 8 since 4.4) or write-back mode (supported since 4.10). mdadm (supported since 9 3.4) has a new option '--write-journal' to create array with cache. Please 11 in write-through mode. A user can switch it to write-back mode by:: 13 echo "write-back" > /sys/block/md0/md/journal_mode 15 And switch it back to write-through mode by:: 17 echo "write-through" > /sys/block/md0/md/journal_mode 22 write-through mode 25 This mode mainly fixes the 'write hole' issue. For RAID 4/5/6 array, an unclean [all …]
D	raid5-ppl.rst	7 may become inconsistent with data on other member disks. If the array is also 9 disks is missing. This can lead to silent data corruption when rebuilding the 10 array or using it is as degraded - data calculated from parity for array blocks 11 that have not been touched by a write request during the unclean shutdown can 12 be incorrect. Such condition is known as the RAID5 Write Hole. Because of 15 Partial parity for a write operation is the XOR of stripe data chunks not 16 modified by this write. It is just enough data needed for recovering from the 17 write hole. XORing partial parity with the modified chunks produces parity for 18 the stripe, consistent with its state before the write operation, regardless of 19 which chunk writes have completed. If one of the not modified data disks of [all …]
/linux-6.12.1/tools/perf/pmu-events/arch/arm64/
D	recommended.json	3 "PublicDescription": "Attributable Level 1 data cache access, read", 9 "PublicDescription": "Attributable Level 1 data cache access, write", 12 "BriefDescription": "L1D cache access, write" 15 "PublicDescription": "Attributable Level 1 data cache refill, read", 21 "PublicDescription": "Attributable Level 1 data cache refill, write", 24 "BriefDescription": "L1D cache refill, write" 27 "PublicDescription": "Attributable Level 1 data cache refill, inner", 33 "PublicDescription": "Attributable Level 1 data cache refill, outer", 39 "PublicDescription": "Attributable Level 1 data cache Write-Back, victim", 42 "BriefDescription": "L1D cache Write-Back, victim" [all …]
/linux-6.12.1/tools/perf/pmu-events/arch/s390/cf_z16/
D	extended.json	3 "Unit": "CPU-M-CF", 6 "BriefDescription": "L1D Read-only Exclusive Writes", 7 …"PublicDescription": "A directory write to the Level-1 Data cache where the line was originally in… 10 "Unit": "CPU-M-CF", 14 …anslation Lookaside Buffer 2 (TLB2) and the request was made by the Level-1 Data cache. This is a … 17 "Unit": "CPU-M-CF", 21 …s for a request made by the Level-1 Data cache. Incremented by one for every TLB2 miss in progress… 24 "Unit": "CPU-M-CF", 28 … into the Combined Region and Segment Table Entry array in the Level-2 TLB for a one-megabyte page… 31 "Unit": "CPU-M-CF", [all …]
/linux-6.12.1/drivers/net/ethernet/aquantia/atlantic/macsec/
D	macsec_api.h	1 /* SPDX-License-Identifier: GPL-2.0-only / 48 /! Read the raw table data from the specified row of the Egress CTL 50 * rec - [OUT] The raw table row data will be unpacked into the fields of rec. 51 * table_index - The table row to read (max 23). 57 /! Pack the fields of rec, and write the packed data into the 59 rec - [IN] The bitfield values to write to the table row. 60 * table_index - The table row to write(max 23). 66 /! Read the raw table data from the specified row of the Egress 68 rec - [OUT] The raw table row data will be unpacked into the fields of rec. 69 * table_index - The table row to read (max 47). [all …]
/linux-6.12.1/kernel/
D	sysctl.c	1 // SPDX-License-Identifier: GPL-2.0-only 9 * Added kernel/java-{interpreter,appletviewer}, 96/5/10, Mike Shaver. 11 * Added kswapd-interval, ctrl-alt-del, printk stuff, 1/8/97, Chris Horn. 85 const int sysctl_vals[] = { 0, 1, 2, 3, 4, 100, 200, 1000, 3000, INT_MAX, 65535, -1 }; 106 * enum sysctl_writes_mode - supported sysctl write modes 108 * @SYSCTL_WRITES_LEGACY: each write syscall must fully contain the sysctl value 116 * sent to the write syscall. If dealing with strings respect the file 121 * These write modes control how current file position affects the behavior of 122 * updating sysctl values through the proc interface on each write. 125 SYSCTL_WRITES_LEGACY = -1, [all …]
/linux-6.12.1/Documentation/wmi/devices/
D	msi-wmi-platform.rst	1 .. SPDX-License-Identifier: GPL-2.0-or-later 4 MSI WMI Platform Features driver (msi-wmi-platform) 18 data using the `bmfdec <https://github.com/pali/bmfdec>`_ utility: 24 guid("{ABBC0F60-8EA1-11d1-00A0-C90629100000}")] 26 [WmiDataId(1), read, write, Description("16 bytes of data")] uint8 Bytes[16]; 31 guid("{ABBC0F63-8EA1-11d1-00A0-C90629100000}")] 33 [WmiDataId(1), read, write, Description("32 bytes of data")] uint8 Bytes[32]; 38 guid("{ABBC0F6E-8EA1-11d1-00A0-C90629100000}")] 43 [WmiMethodId(1), Implemented, read, write, Description("Return the contents of a package")] 44 void GetPackage([out, id(0)] Package Data); [all …]
/linux-6.12.1/net/sctp/
D	sysctl.c	1 // SPDX-License-Identifier: GPL-2.0-or-later 12 * lksctp developers <linux-sctp@vger.kernel.org> 46 static int proc_sctp_do_hmac_alg(const struct ctl_table ctl, int write, 48 static int proc_sctp_do_rto_min(const struct ctl_table ctl, int write, 50 static int proc_sctp_do_rto_max(const struct ctl_table ctl, int write, void buffer, 52 static int proc_sctp_do_udp_port(const struct ctl_table ctl, int write, void buffer, 54 static int proc_sctp_do_alpha_beta(const struct ctl_table ctl, int write, 56 static int proc_sctp_do_auth(const struct ctl_table ctl, int write, 58 static int proc_sctp_do_probe_interval(const struct ctl_table *ctl, int write, 64 .data = &sysctl_sctp_mem, [all …]
/linux-6.12.1/Documentation/devicetree/bindings/memory-controllers/
D	st,stm32-fmc2-ebi-props.yaml	`1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/memory-controllers/st,stm32-fmc2-ebi-props.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Christophe Kerello <christophe.kerello@foss.st.com> 11 - Marek Vasut <marex@denx.de> 14 st,fmc2-ebi-cs-transaction-type: 25 8: Synchronous read synchronous write PSRAM. 26 9: Synchronous read asynchronous write PSRAM. 27 10: Synchronous read synchronous write NOR. [all …]`
/linux-6.12.1/tools/perf/pmu-events/arch/arm64/arm/neoverse-v1/
D	l1d_cache.json	4 …ion": "Counts level 1 data cache refills caused by speculatively executed load or store operations… 8 …data cache accesses from any load/store operations. Atomic operations that resolve in the CPUs cac… 12 …write-backs of dirty data from the L1 data cache to the L2 cache. This occurs when either a dirty … 16 …"PublicDescription": "Counts cache line refills into the level 1 data cache from any memory read o… 20 …Counts level 1 data cache accesses from any load operation. Atomic load operations that resolve in… 24 …data cache accesses generated by store operations. This event also counts accesses caused by a DC … 28 …nts level 1 data cache refills caused by speculatively executed load instructions where the memory… 32 …ts level 1 data cache refills caused by speculatively executed store instructions where the memory… 36 …"PublicDescription": "Counts level 1 data cache refills where the cache line data came from caches… 40 …"PublicDescription": "Counts level 1 data cache refills for which the cache line data came from ou… [all …]
/linux-6.12.1/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/
D	l1d_cache.json	4 …ion": "Counts level 1 data cache refills caused by speculatively executed load or store operations… 8 …data cache accesses from any load/store operations. Atomic operations that resolve in the CPUs cac… 12 …write-backs of dirty data from the L1 data cache to the L2 cache. This occurs when either a dirty … 16 …"PublicDescription": "Counts cache line refills into the level 1 data cache from any memory read o… 20 …"Counts level 1 data cache accesses from any load operation. Atomic load operations that resolve i… 24 …data cache accesses generated by store operations. This event also counts accesses caused by a DC … 28 …nts level 1 data cache refills caused by speculatively executed load instructions where the memory… 32 …ts level 1 data cache refills caused by speculatively executed store instructions where the memory… 36 …"PublicDescription": "Counts level 1 data cache refills where the cache line data came from caches… 40 …"PublicDescription": "Counts level 1 data cache refills for which the cache line data came from ou… [all …]
/linux-6.12.1/tools/perf/pmu-events/arch/s390/cf_z13/
D	extended.json	3 "Unit": "CPU-M-CF", 6 "BriefDescription": "L1D Read-only Exclusive Writes", 7 …"PublicDescription": "A directory write to the Level-1 Data cache where the line was originally in… 10 "Unit": "CPU-M-CF", 14 …"PublicDescription": "A translation entry has been written to the Level-1 Data Translation Lookasi… 17 "Unit": "CPU-M-CF", 21 …"PublicDescription": "Level-1 Data TLB miss in progress. Incremented by one for every cycle a DTLB… 24 "Unit": "CPU-M-CF", 27 "BriefDescription": "DTLB1 One-Megabyte Page Writes", 28 …": "A translation entry has been written to the Level-1 Data Translation Lookaside Buffer for a on… [all …]
/linux-6.12.1/tools/perf/pmu-events/arch/arm64/arm/neoverse-n1/
D	l1d_cache.json	4 …ion": "Counts level 1 data cache refills caused by speculatively executed load or store operations… 8 …data cache accesses from any load/store operations. Atomic operations that resolve in the CPUs cac… 12 …write-backs of dirty data from the L1 data cache to the L2 cache. This occurs when either a dirty … 16 …Counts level 1 data cache accesses from any load operation. Atomic load operations that resolve in… 20 …data cache accesses generated by store operations. This event also counts accesses caused by a DC … 24 …nts level 1 data cache refills caused by speculatively executed load instructions where the memory… 28 …ts level 1 data cache refills caused by speculatively executed store instructions where the memory… 32 …"PublicDescription": "Counts level 1 data cache refills where the cache line data came from caches… 36 …"PublicDescription": "Counts level 1 data cache refills for which the cache line data came from ou… 40 …"PublicDescription": "Counts dirty cache line evictions from the level 1 data cache caused by a ne… [all …]
/linux-6.12.1/tools/perf/pmu-events/arch/s390/cf_z14/
D	extended.json	3 "Unit": "CPU-M-CF", 6 "BriefDescription": "L1D Read-only Exclusive Writes", 7 …"PublicDescription": "A directory write to the Level-1 Data cache where the line was originally in… 10 "Unit": "CPU-M-CF", 14 …The Translation Lookaside Buffer 2 (TLB2) and the request was made by the data cache. This is a re… 17 "Unit": "CPU-M-CF", 21 …progress for a request made by the data cache. Incremented by one for every TLB2 miss in progress … 24 "Unit": "CPU-M-CF", 27 "BriefDescription": "DTLB2 One-Megabyte Page Writes", 28 … into the Combined Region and Segment Table Entry array in the Level-2 TLB for a one-megabyte page… [all …]
/linux-6.12.1/tools/perf/pmu-events/arch/s390/cf_zec12/
D	extended.json	3 "Unit": "CPU-M-CF", 7 …"PublicDescription": "Level-1 Data TLB miss in progress. Incremented by one for every cycle a DTLB… 10 "Unit": "CPU-M-CF", 14 …"PublicDescription": "Level-1 Instruction TLB miss in progress. Incremented by one for every cycle… 17 "Unit": "CPU-M-CF", 21 …Description": "A directory write to the Level-1 Data cache directory where the returned cache line… 24 "Unit": "CPU-M-CF", 28 …ription": "A directory write to the Level-1 Instruction cache directory where the returned cache l… 31 "Unit": "CPU-M-CF", 35 …cription": "A directory write to the Level-1 Data cache directory where the returned cache line wa… [all …]
/linux-6.12.1/drivers/net/ethernet/intel/igc/
D	igc_diag.c	1 // SPDX-License-Identifier: GPL-2.0 35 static bool reg_pattern_test(struct igc_adapter adapter, u64 data, int reg, in reg_pattern_test() argument 36 u32 mask, u32 write) in reg_pattern_test() argument 38 struct igc_hw hw = &adapter->hw; in reg_pattern_test() 46 wr32(reg, test_pattern[pat] & write); in reg_pattern_test() 48 if (val != (test_pattern[pat] & write & mask)) { in reg_pattern_test() 49 netdev_err(adapter->netdev, in reg_pattern_test() 51 reg, val, test_pattern[pat] & write & mask); in reg_pattern_test() 52 data = reg; in reg_pattern_test() 61 static bool reg_set_and_check(struct igc_adapter adapter, u64 data, int reg, in reg_set_and_check() argument [all …]
/linux-6.12.1/tools/perf/pmu-events/arch/arm64/arm/cortex-a510/
D	cache.json	102 …-complex L2 cache, this event does not count. If the complex is configured without a per-complex L… 105 …-complex L2 cache, this event does not count. If the complex is configured without a per-complex L… 108 …ption": "L1 data cache refill due to prefetch. This event counts any linefills from the prefetcher… 111 …ption": "L1 data cache refill due to prefetch. This event counts any linefills from the prefetcher… 114 …"PublicDescription": "L2 cache write streaming mode. This event counts for each cycle where the co… 117 …"BriefDescription": "L2 cache write streaming mode. This event counts for each cycle where the cor… 120 …"PublicDescription": "L1 data cache entering write streaming mode. This event counts for each entr… 123 …"BriefDescription": "L1 data cache entering write streaming mode. This event counts for each entry… 126 …data cache write streaming mode. This event counts for each cycle where the core is in write strea… 129 …data cache write streaming mode. This event counts for each cycle where the core is in write strea… [all …]
/linux-6.12.1/tools/perf/pmu-events/arch/s390/cf_z15/
D	extended.json	3 "Unit": "CPU-M-CF", 6 "BriefDescription": "L1D Read-only Exclusive Writes", 7 …"PublicDescription": "A directory write to the Level-1 Data cache where the line was originally in… 10 "Unit": "CPU-M-CF", 14 …The Translation Lookaside Buffer 2 (TLB2) and the request was made by the data cache. This is a re… 17 "Unit": "CPU-M-CF", 21 …progress for a request made by the data cache. Incremented by one for every TLB2 miss in progress … 24 "Unit": "CPU-M-CF", 27 "BriefDescription": "DTLB2 One-Megabyte Page Writes", 28 … into the Combined Region and Segment Table Entry array in the Level-2 TLB for a one-megabyte page… [all …]
/linux-6.12.1/drivers/char/xilinx_hwicap/
D	fifo_icap.c	24 * (c) Copyright 2007-2008 Xilinx Inc. 28 * with this program; if not, write to the Free Software Foundation, Inc., 39 #define XHI_WF_OFFSET 0x100 /* Write FIFO / 44 #define XHI_WFV_OFFSET 0x114 / Write FIFO Vacancy Register / 56 write. 67 #define XHI_IPIXR_WEMPTY_MASK 0x00000004 /* Write FIFO Empty / 69 #define XHI_IPIXR_WRP_MASK 0x00000001 / Write FIFO half full / 76 #define XHI_CR_WRITE_MASK 0x00000001 / Write from FIFO to ICAP / 79 #define XHI_WFO_MAX_VACANCY 1024 / Max Write FIFO Vacancy, in words / 87 fifo_icap_fifo_write - Write data to the write FIFO. [all …]
/linux-6.12.1/include/uapi/linux/
D	virtio_pcidev.h	1 /* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) / 11 enum virtio_pcidev_ops - virtual PCI device operations 14 * the @data field should be filled in by the device (in little endian). 15 * @VIRTIO_PCIDEV_OP_CFG_WRITE: write config space, size is 1, 2, 4 or 8; 16 * the @data field contains the data to write (in little endian). 18 * the @data field should be filled in by the device (in little endian). 19 * @VIRTIO_PCIDEV_OP_MMIO_WRITE: write BAR mem/pio, size can be variable; 20 * the @data field contains the data to write (in little endian). 22 * the @data field only has one byte (unlike @VIRTIO_PCIDEV_OP_MMIO_WRITE) 23 * @VIRTIO_PCIDEV_OP_INT: legacy INTx# pin interrupt, the addr field is 1-4 for [all …]
/linux-6.12.1/net/core/
D	sysctl_net_core.c	1 // SPDX-License-Identifier: GPL-2.0 2 /* -- linux-c -- 43 /* 0 - Keep current behavior: 46 * 1 - Both inherit all current settings from init_net 47 * 2 - Both reset all settings to default 48 * 3 - Both inherit all settings from current netns 65 len = min(sizeof(kbuf) - 1, *lenp); in dump_cpumask() 86 if (net->core.rps_default_mask) in rps_default_mask_cow_alloc() 87 return net->core.rps_default_mask; in rps_default_mask_cow_alloc() 94 WRITE_ONCE(net->core.rps_default_mask, rps_default_mask); in rps_default_mask_cow_alloc() [all …]
/linux-6.12.1/drivers/scsi/
D	sense_codes.h	1 /* SPDX-License-Identifier: GPL-2.0 / 4 http://www.t10.org/lists/asc-num.txt [most recent: 20200817] 9 SENSE_CODE(0x0002, "End-of-partition/medium detected") 11 SENSE_CODE(0x0004, "Beginning-of-partition/medium detected") 12 SENSE_CODE(0x0005, "End-of-data detected") 38 SENSE_CODE(0x0300, "Peripheral device write fault") 39 SENSE_CODE(0x0301, "No write current") 40 SENSE_CODE(0x0302, "Excessive write errors") 50 SENSE_CODE(0x0408, "Logical unit not ready, long write in progress") 51 SENSE_CODE(0x0409, "Logical unit not ready, self-test in progress") [all …]
/linux-6.12.1/Documentation/filesystems/spufs/
D	spufs.rst	1 .. SPDX-License-Identifier: GPL-2.0 10 spufs - the SPU file system 21 message queues. Users that have write permissions on the file system 26 logical SPU. Users can change permissions on those files, but not actu- 43 The files in spufs mostly follow the standard behavior for regular sys- 44 tem calls like read(2) or write(2), but often support only a subset of 50 all files that support the write(2) operation also support writev(2). 55 All files support the chmod(2)/fchmod(2) and chown(2)/fchown(2) opera- 65 data in the address space of the SPU. The possible operations on an 68 read(2), pread(2), write(2), pwrite(2), lseek(2) [all …]
/linux-6.12.1/net/ipv4/
D	sysctl_net_ipv4.c	1 // SPDX-License-Identifier: GPL-2.0 26 static int tcp_adv_win_scale_min = -31; 57 if (same_parity && !net->ipv4.ip_local_ports.warned) { in set_local_port_range() 58 net->ipv4.ip_local_ports.warned = true; in set_local_port_range() 61 WRITE_ONCE(net->ipv4.ip_local_ports.range, high << 16 \| low); in set_local_port_range() 65 static int ipv4_local_port_range(const struct ctl_table table, int write, in ipv4_local_port_range() argument 68 struct net net = table->data; in ipv4_local_port_range() 72 .data = &range, in ipv4_local_port_range() 74 .mode = table->mode, in ipv4_local_port_range() 81 ret = proc_dointvec_minmax(&tmp, write, buffer, lenp, ppos); in ipv4_local_port_range() [all …]
/linux-6.12.1/tools/perf/pmu-events/arch/x86/amdzen4/
D	data-fabric.json	4 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 0.", 12 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 1.", 20 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 2.", 28 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 3.", 36 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 4.", 44 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 5.", 52 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 6.", 60 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 7.", 68 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 8.", 76 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 9.", [all …]

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