s390/cf_z14/extended.json

3 		"Unit": "CPU-M-CF",
6 		"BriefDescription": "L1D Read-only Exclusive Writes",
7 …"PublicDescription": "A directory write to the Level-1 Data cache where the line was originally in…
10 		"Unit": "CPU-M-CF",
14 …The Translation Lookaside Buffer 2 (TLB2) and the request was made by the data cache. This is a re…
17 		"Unit": "CPU-M-CF",
21 …progress for a request made by the data cache. Incremented by one for every TLB2 miss in progress …
24 		"Unit": "CPU-M-CF",
27 		"BriefDescription": "DTLB2 One-Megabyte Page Writes",
28 … into the Combined Region and Segment Table Entry array in the Level-2 TLB for a one-megabyte page…
31 		"Unit": "CPU-M-CF",
34 		"BriefDescription": "DTLB2 Two-Gigabyte Page Writes",
35 …"PublicDescription": "A translation entry for a two-gigabyte page was written into the Level-2 TLB…
38 		"Unit": "CPU-M-CF",
42 …cription": "A directory write to the Level-1 Data cache directory where the returned cache line wa…
45 		"Unit": "CPU-M-CF",
52 		"Unit": "CPU-M-CF",
56 …tion cache. Incremented by one for every TLB2 miss in progress for the Level-1 Instruction cache i…
59 		"Unit": "CPU-M-CF",
63 …ription": "A directory write to the Level-1 Instruction cache directory where the returned cache l…
66 		"Unit": "CPU-M-CF",
70 …Description": "A translation entry was written into the Page Table Entry array in the Level-2 TLB."
73 		"Unit": "CPU-M-CF",
77 …e Combined Region and Segment Table Entry array and the Page Table Entry array in the Level-2 TLB."
80 		"Unit": "CPU-M-CF",
84 		"PublicDescription": "The number of Level-2 TLB translation engines busy in a cycle."
87 		"Unit": "CPU-M-CF",
91 …"PublicDescription": "A TEND instruction has completed in a constrained transactional-execution mo…
94 		"Unit": "CPU-M-CF",
97 		"BriefDescription": "Completed TEND instructions in non-constrained TX mode",
98 …"PublicDescription": "A TEND instruction has completed in a non-constrained transactional-executio…
101 		"Unit": "CPU-M-CF",
105 …"PublicDescription": "Increments by one for any cycle where a level-1 cache or level-2 TLB miss is…
108 		"Unit": "CPU-M-CF",
111 		"BriefDescription": "L1D On-Chip L3 Sourced Writes",
112 …ription": "A directory write to the Level-1 Data cache directory where the returned cache line was…
115 		"Unit": "CPU-M-CF",
118 		"BriefDescription": "L1D On-Chip Memory Sourced Writes",
119 …licDescription": "A directory write to the Level-1 Data cache directory where the returned cache l…
122 		"Unit": "CPU-M-CF",
125 		"BriefDescription": "L1D On-Chip L3 Sourced Writes with Intervention",
126 …ription": "A directory write to the Level-1 Data cache directory where the returned cache line was…
129 		"Unit": "CPU-M-CF",
132 		"BriefDescription": "L1D On-Cluster L3 Sourced Writes",
133 …ription": "A directory write to the Level-1 Data cache directory where the returned cache line was…
136 		"Unit": "CPU-M-CF",
139 		"BriefDescription": "L1D On-Cluster Memory Sourced Writes",
140 …icDescription": "A directory write to the Level-1 Data cache directory where the returned cache li…
143 		"Unit": "CPU-M-CF",
146 		"BriefDescription": "L1D On-Cluster L3 Sourced Writes with Intervention",
147 …iption": "A directory write to the Level-1 Data cache directory where the returned cache line was …
150 		"Unit": "CPU-M-CF",
153 		"BriefDescription": "L1D Off-Cluster L3 Sourced Writes",
154 …ption": "A directory write to the Level-1 Data cache directory where the returned cache line was s…
157 		"Unit": "CPU-M-CF",
160 		"BriefDescription": "L1D Off-Cluster Memory Sourced Writes",
161 …licDescription": "A directory write to the Level-1 Data cache directory where the returned cache l…
164 		"Unit": "CPU-M-CF",
167 		"BriefDescription": "L1D Off-Cluster L3 Sourced Writes with Intervention",
168 …ption": "A directory write to the Level-1 Data cache directory where the returned cache line was s…
171 		"Unit": "CPU-M-CF",
174 		"BriefDescription": "L1D Off-Drawer L3 Sourced Writes",
175 …iption": "A directory write to the Level-1 Data cache directory where the returned cache line was …
178 		"Unit": "CPU-M-CF",
181 		"BriefDescription": "L1D Off-Drawer Memory Sourced Writes",
182 …licDescription": "A directory write to the Level-1 Data cache directory where the returned cache l…
185 		"Unit": "CPU-M-CF",
188 		"BriefDescription": "L1D Off-Drawer L3 Sourced Writes with Intervention",
189 …iption": "A directory write to the Level-1 Data cache directory where the returned cache line was …
192 		"Unit": "CPU-M-CF",
195 		"BriefDescription": "L1D On-Drawer L4 Sourced Writes",
196 …cription": "A directory write to the Level-1 Data cache directory where the returned cache line wa…
199 		"Unit": "CPU-M-CF",
202 		"BriefDescription": "L1D Off-Drawer L4 Sourced Writes",
203 …ription": "A directory write to the Level-1 Data cache directory where the returned cache line was…
206 		"Unit": "CPU-M-CF",
209 		"BriefDescription": "L1D On-Chip L3 Sourced Writes read-only",
210 …ption": "A directory write to the Level-1 Data cache directory where the returned cache line was s…
213 		"Unit": "CPU-M-CF",
216 		"BriefDescription": "L1I On-Chip L3 Sourced Writes",
217 …tion": "A directory write to the Level-1 Instruction cache directory where the returned cache ine …
220 		"Unit": "CPU-M-CF",
223 		"BriefDescription": "L1I On-Chip Memory Sourced Writes",
224 …Description": "A directory write to the Level-1 Instruction cache directory where the returned cac…
227 		"Unit": "CPU-M-CF",
230 		"BriefDescription": "L1I On-Chip L3 Sourced Writes with Intervention",
231 …tion": "A directory write to the Level-1 Instruction cache directory where the returned cache ine …
234 		"Unit": "CPU-M-CF",
237 		"BriefDescription": "L1I On-Cluster L3 Sourced Writes",
238 …on": "A directory write to the Level-1 Instruction cache directory where the returned cache line w…
241 		"Unit": "CPU-M-CF",
244 		"BriefDescription": "L1I On-Cluster Memory Sourced Writes",
245 …scription": "A directory write to the Level-1 Instruction cache directory where the returned cache…
248 		"Unit": "CPU-M-CF",
251 		"BriefDescription": "L1I On-Cluster L3 Sourced Writes with Intervention",
252 …tion": "A directory write to the Level-1 Instruction cache directory where the returned cache line…
255 		"Unit": "CPU-M-CF",
258 		"BriefDescription": "L1I Off-Cluster L3 Sourced Writes",
259 …on": "A directory write to the Level-1 Instruction cache directory where the returned cache line w…
262 		"Unit": "CPU-M-CF",
265 		"BriefDescription": "L1I Off-Cluster Memory Sourced Writes",
266 …escription": "A directory write to the Level-1 Instruction cache directory where the returned cach…
269 		"Unit": "CPU-M-CF",
272 		"BriefDescription": "L1I Off-Cluster L3 Sourced Writes with Intervention",
273 …on": "A directory write to the Level-1 Instruction cache directory where the returned cache line w…
276 		"Unit": "CPU-M-CF",
279 		"BriefDescription": "L1I Off-Drawer L3 Sourced Writes",
280 …on": "A directory write to the Level-1 Instruction cache directory where the returned cache line w…
283 		"Unit": "CPU-M-CF",
286 		"BriefDescription": "L1I Off-Drawer Memory Sourced Writes",
287 …escription": "A directory write to the Level-1 Instruction cache directory where the returned cach…
290 		"Unit": "CPU-M-CF",
293 		"BriefDescription": "L1I Off-Drawer L3 Sourced Writes with Intervention",
294 …on": "A directory write to the Level-1 Instruction cache directory where the returned cache line w…
297 		"Unit": "CPU-M-CF",
300 		"BriefDescription": "L1I On-Drawer L4 Sourced Writes",
301 …tion": "A directory write to the Level-1 Instruction cache directory where the returned cache line…
304 		"Unit": "CPU-M-CF",
307 		"BriefDescription": "L1I Off-Drawer L4 Sourced Writes",
308 …tion": "A directory write to the Level-1 Instruction cache directory where the returned cache line…
311 		"Unit": "CPU-M-CF",
318 		"Unit": "CPU-M-CF",
325 		"Unit": "CPU-M-CF",
332 		"Unit": "CPU-M-CF",
339 		"Unit": "CPU-M-CF",
342 		"BriefDescription": "Aborted transactions in non-constrained TX mode",
343 …"PublicDescription": "A transaction abort has occurred in a non-constrained transactional-executio…
346 		"Unit": "CPU-M-CF",
350 …"PublicDescription": "A transaction abort has occurred in a constrained transactional-execution mo…
353 		"Unit": "CPU-M-CF",
357 …"PublicDescription": "A transaction abort has occurred in a constrained transactional-execution mo…
360 		"Unit": "CPU-M-CF",
367 		"Unit": "CPU-M-CF",