| /linux-6.12.1/Documentation/devicetree/bindings/display/bridge/ |
| D | chrontel,ch7033.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Chrontel CH7033 Video Encoder
11 - Lubomir Rintel <lkundrak@v3.sk>
33 DVI port, should be connected to a node compatible with the
34 dvi-connector binding.
37 - port@0
38 - port@1
41 - compatible
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| /linux-6.12.1/include/drm/ |
| D | drm_encoder.h | 36 * struct drm_encoder_funcs - encoder controls
44 * Reset encoder hardware and software state to off. This function isn't
48 void (*reset)(struct drm_encoder *encoder);
53 * Clean up encoder resources. This is only called at driver unload time
54 * through drm_mode_config_cleanup() since an encoder cannot be
57 void (*destroy)(struct drm_encoder *encoder);
63 * interfaces attached to the encoder.
72 int (*late_register)(struct drm_encoder *encoder);
78 * userspace interfaces attached to the encoder from
83 void (*early_unregister)(struct drm_encoder *encoder);
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| D | drm_crtc.h | 3 * Copyright © 2007-2008 Dave Airlie
4 * Copyright © 2007-2008 Intel Corporation
67 * struct drm_crtc_state - mutable CRTC state
138 * Drivers are supposed to set this as-needed from their own atomic
204 * @encoder_mask: Bitmask of drm_encoder_mask(encoder) of encoders
220 * display timings used between the CRTC and encoder blocks.
235 * built-in panel), this mode here should match the physical mode on the
298 * hardware capabiltiy - lacking support is not treated as failure.
327 * - The event is for a CRTC which is being disabled through this
335 * - For a CRTC which is enabled at the end of the commit (even when it
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| /linux-6.12.1/drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_connectors.c | 2 * Copyright 2007-8 Advanced Micro Devices, Inc.
45 struct drm_device *dev = connector->dev; in amdgpu_connector_hotplug()
50 * VGA, TV, etc. in amdgpu_connector_hotplug()
52 if (amdgpu_connector->hpd.hpd == AMDGPU_HPD_NONE) in amdgpu_connector_hotplug()
55 amdgpu_display_hpd_set_polarity(adev, amdgpu_connector->hpd.hpd); in amdgpu_connector_hotplug()
58 if (connector->dpms != DRM_MODE_DPMS_ON) in amdgpu_connector_hotplug()
62 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) { in amdgpu_connector_hotplug()
64 amdgpu_connector->con_priv; in amdgpu_connector_hotplug()
67 if (dig_connector->dp_sink_type != CONNECTOR_OBJECT_ID_DISPLAYPORT) in amdgpu_connector_hotplug()
71 dig_connector->dp_sink_type = amdgpu_atombios_dp_get_sinktype(amdgpu_connector); in amdgpu_connector_hotplug()
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| D | amdgpu_mode.h | 40 #include <linux/i2c-algo-bit.h>
128 /* amdgpu gpio-based i2c
150 /* uses multi-media i2c engine */
317 /* DVI-I properties */
334 /* pointer to backlight encoder */
346 /* Driver-private color mgmt props */
354 * size of degamma LUT as supported by the driver (read-only).
358 * @plane_degamma_tf_property: Plane pre-defined transfer function to
369 * @shaper_lut_property: Plane property to set pre-blending shaper LUT
372 * combine the user LUT values with pre-defined TF into the LUT
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| /linux-6.12.1/drivers/gpu/drm/radeon/ |
| D | radeon_connectors.c | 2 * Copyright 2007-8 Advanced Micro Devices, Inc.
42 struct drm_device *dev = connector->dev; in radeon_connector_hotplug()
43 struct radeon_device *rdev = dev->dev_private; in radeon_connector_hotplug()
47 * VGA, TV, etc. in radeon_connector_hotplug()
49 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) in radeon_connector_hotplug()
52 radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd); in radeon_connector_hotplug()
56 if (connector->dpms != DRM_MODE_DPMS_ON) in radeon_connector_hotplug()
60 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) { in radeon_connector_hotplug()
62 radeon_connector->con_priv; in radeon_connector_hotplug()
65 if (dig_connector->dp_sink_type != CONNECTOR_OBJECT_ID_DISPLAYPORT) in radeon_connector_hotplug()
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| D | radeon_combios.c | 3 * Copyright 2007-8 Advanced Micro Devices, Inc.
133 struct radeon_device *rdev = dev->dev_private; in combios_get_table_offset()
137 if (!rdev->bios) in combios_get_table_offset()
362 size = RBIOS8(rdev->bios_header_start + 0x6); in combios_get_table_offset()
365 offset = RBIOS16(rdev->bios_header_start + check_offset); in combios_get_table_offset()
379 raw = rdev->bios + edid_info; in radeon_combios_check_hardcoded_edid()
388 rdev->mode_info.bios_hardcoded_edid = edid; in radeon_combios_check_hardcoded_edid()
396 return drm_edid_duplicate(drm_edid_raw(rdev->mode_info.bios_hardcoded_edid)); in radeon_bios_get_hardcoded_edid()
447 if (rdev->family == CHIP_RS300 || in combios_setup_i2c_bus()
448 rdev->family == CHIP_RS400 || in combios_setup_i2c_bus()
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| D | radeon_atombios.c | 2 * Copyright 2007-8 Advanced Micro Devices, Inc.
36 #include "atom-bits.h"
52 if ((rdev->family == CHIP_R420) || in radeon_lookup_i2c_gpio_quirks()
53 (rdev->family == CHIP_R423) || in radeon_lookup_i2c_gpio_quirks()
54 (rdev->family == CHIP_RV410)) { in radeon_lookup_i2c_gpio_quirks()
55 if ((le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x0018) || in radeon_lookup_i2c_gpio_quirks()
56 (le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x0019) || in radeon_lookup_i2c_gpio_quirks()
57 (le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x001a)) { in radeon_lookup_i2c_gpio_quirks()
58 gpio->ucClkMaskShift = 0x19; in radeon_lookup_i2c_gpio_quirks()
59 gpio->ucDataMaskShift = 0x18; in radeon_lookup_i2c_gpio_quirks()
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| D | radeon_mode.h | 39 #include <linux/i2c-algo-bit.h>
98 /* radeon gpio-based i2c
120 /* uses multi-media i2c engine */
247 /* DVI-I properties */
270 /* pointer to backlight encoder */
273 /* bitmask for active encoder frontends */
280 struct radeon_encoder *encoder; member
355 struct drm_encoder *encoder; member
421 int dig_encoder; /* -1 disabled, 0 DIGA, 1 DIGB, etc. */
519 /* some systems have an hdmi and vga port with a shared ddc line */
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| D | atombios.h | 2 * Copyright 2006-2007 Advanced Micro Devices, Inc.
214 UCHAR uaFirmWareSignature[4]; /*Signature to distinguish between Atombios and non-atombios,
397 …ONG ulPointerReturnFlag:1; // BYTE_3[7]=1 - Return the pointer to the right Data Block; BYTE_…
403 …ONG ulPointerReturnFlag:1; // BYTE_3[7]=1 - Return the pointer to the right Data Block; BYTE_…
410 …ULONG ulClock; //When returen, it's the re-calculated clock based on given Fb_div Post_Di…
504 …UCHAR ucInputFlag; //Input Flags. ucInputFlag[0] - Strobe(1)/Performance(0)…
536 #define ATOM_PLL_INPUT_FLAG_PLL_STROBE_MODE_EN 1 // 1-StrobeMode, 0-PerformanceMode
544 …bDiv; //Output:UPPER_WORD=FB_DIV_INTEGER, LOWER_WORD=FB_DIV_FRAC shl (16-FB_FRACTION_BITS)
549 … //Input : ATOM_PLL_INPUT_FLAG_PLL_STROBE_MODE_EN: 1-StrobeMode, 0-PerformanceMode
678 UCHAR ucAction; // 0: turn off encoder
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| /linux-6.12.1/drivers/gpu/drm/bridge/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
21 Simple transparent bridge that is used by several non-DRM drivers to
36 tristate "Chipone ICN6211 MIPI-DSI/RGB Converter bridge"
43 ICN6211 is MIPI-DSI/RGB Converter bridge from chipone.
51 tristate "Chrontel CH7033 Video Encoder"
55 Enable support for the Chrontel CH7033 VGA/DVI/HDMI Encoder, as
67 ChromeOS EC ANX7688 is an ultra-low power
68 4K Ultra-HD (4096x2160p60) mobile HD transmitter
70 2.0 to DisplayPort 1.3 Ultra-HD. It is connected
77 Driver for display connectors with support for DDC and hot-plug
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| /linux-6.12.1/drivers/gpu/drm/i915/display/ |
| D | intel_crt.c | 2 * Copyright © 2006-2007 Intel Corporation
68 * encoder's enable/disable callbacks */
74 static struct intel_crt *intel_encoder_to_crt(struct intel_encoder *encoder) in intel_encoder_to_crt() argument
76 return container_of(encoder, struct intel_crt, base); in intel_encoder_to_crt()
100 static bool intel_crt_get_hw_state(struct intel_encoder *encoder, in intel_crt_get_hw_state() argument
103 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in intel_crt_get_hw_state()
104 struct intel_crt *crt = intel_encoder_to_crt(encoder); in intel_crt_get_hw_state()
109 encoder->power_domain); in intel_crt_get_hw_state()
113 ret = intel_crt_port_enabled(dev_priv, crt->adpa_reg, pipe); in intel_crt_get_hw_state()
115 intel_display_power_put(dev_priv, encoder->power_domain, wakeref); in intel_crt_get_hw_state()
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| D | intel_sdvo.c | 3 * Copyright © 2006-2007 Intel Corporation
65 #define IS_TV(c) ((c)->output_flag & SDVO_TV_MASK)
66 #define IS_TMDS(c) ((c)->output_flag & SDVO_TMDS_MASK)
67 #define IS_LVDS(c) ((c)->output_flag & SDVO_LVDS_MASK)
68 #define IS_TV_OR_LVDS(c) ((c)->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
69 #define IS_DIGITAL(c) ((c)->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
71 #define HAS_DDC(c) ((c)->output_flag & (SDVO_RGB_MASK | SDVO_TMDS_MASK | \
122 * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
138 /* add the property for the SDVO-TV */
156 /* add the property for the SDVO-TV/LVDS */
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| D | intel_dp.c | 93 #define dp_to_i915(__intel_dp) to_i915(dp_to_dig_port(__intel_dp)->base.base.dev)
122 * intel_dp_is_edp - is the given port attached to an eDP panel (either CPU or PCH)
128 * This function is not safe to use prior to encoder type being set.
134 return dig_port->base.type == INTEL_OUTPUT_EDP; in intel_dp_is_edp()
142 return drm_dp_is_uhbr_rate(crtc_state->port_clock); in intel_dp_is_uhbr()
146 * intel_dp_link_symbol_size - get the link symbol size for a given link rate
150 * rate -> channel coding.
158 * intel_dp_link_symbol_clock - convert link rate to link symbol clock
172 return drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel); in max_dprx_rate()
174 return drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]); in max_dprx_rate()
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| /linux-6.12.1/drivers/gpu/drm/ |
| D | drm_connector.c | 49 * opposed to all other KMS objects representing hardware (like CRTC, encoder or
51 * Hence they are reference-counted using drm_connector_get() and
61 * Connectors must be attached to an encoder to be used. For devices that map
64 * driver must also set the &drm_connector.encoder field to point to the
65 * attached encoder.
67 * For connectors which are not fixed (like built-in panels) the driver needs to
76 * Note drm_connector_[un]register() first take connector->lock and then
89 * Connector and encoder types.
93 { DRM_MODE_CONNECTOR_VGA, "VGA" },
94 { DRM_MODE_CONNECTOR_DVII, "DVI-I" },
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/link/ |
| D | link_detection.c | 52 link->ctx->logger
68 static const u8 dp_hdmi_dongle_signature_str[] = "DP-HDMI ADAPTOR";
103 static enum signal_type get_basic_signal_type(struct graphics_object_id encoder, in get_basic_signal_type() argument
109 switch (encoder.id) { in get_basic_signal_type()
121 switch (encoder.id) { in get_basic_signal_type()
173 if (link->is_dig_mapping_flexible) in link_detect_sink_signal_type()
176 enc_id = link->link_enc->id; in link_detect_sink_signal_type()
177 result = get_basic_signal_type(enc_id, link->link_id); in link_detect_sink_signal_type()
180 if (link->ep_type != DISPLAY_ENDPOINT_PHY) in link_detect_sink_signal_type()
183 /* Internal digital encoder will detect only dongles in link_detect_sink_signal_type()
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| /linux-6.12.1/drivers/gpu/drm/display/ |
| D | drm_bridge_connector.c | 1 // SPDX-License-Identifier: GPL-2.0+
44 * operation flags (&drm_bridge->ops) and bridge output type
45 * (&drm_bridge->type), as well as the DRM_BRIDGE_ATTACH_NO_CONNECTOR attach
50 * struct drm_bridge_connector - A connector backed by a chain of bridges
58 * @encoder:
60 * The encoder at the start of the bridges chain.
62 struct drm_encoder *encoder; member
74 * hot-plug detection notification, if any (see &DRM_BRIDGE_OP_HPD).
103 /* -----------------------------------------------------------------------------
104 * Bridge Connector Hot-Plug Handling
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| D | drm_dp_helper.c | 76 return link_status[r - DP_LANE0_1_STATUS]; in dp_link_status()
230 drm_dbg_kms(aux->drm_dev, "%s: invalid AUX interval 0x%02x (max 4)\n", in __8b10b_clock_recovery_delay_us()
231 aux->name, rd_interval); in __8b10b_clock_recovery_delay_us()
242 drm_dbg_kms(aux->drm_dev, "%s: invalid AUX interval 0x%02x (max 4)\n", in __8b10b_channel_eq_delay_us()
243 aux->name, rd_interval); in __8b10b_channel_eq_delay_us()
255 drm_dbg_kms(aux->drm_dev, "%s: invalid AUX interval 0x%02x\n", in __128b132b_channel_eq_delay_us()
256 aux->name, rd_interval); in __128b132b_channel_eq_delay_us()
278 * - Clock recovery vs. channel equalization
279 * - DPRX vs. LTTPR
280 * - 128b/132b vs. 8b/10b
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| /linux-6.12.1/drivers/gpu/drm/nouveau/dispnv04/ |
| D | dfp.c | 5 * Copyright 2007-2009 Stuart Bennett
58 * this does not give a correct answer for off-chip dvi, but there's no in nv04_dfp_get_bound_head()
61 int ramdac = (dcbent->or & DCB_OUTPUT_C) >> 2; in nv04_dfp_get_bound_head()
72 * Luckily we do know the values ;-) in nv04_dfp_bind_head()
78 int ramdac = (dcbent->or & DCB_OUTPUT_C) >> 2; in nv04_dfp_bind_head()
84 if (dcbent->type == DCB_OUTPUT_LVDS) in nv04_dfp_bind_head()
87 nv_write_tmds(dev, dcbent->or, 0, 0x04, tmds04); in nv04_dfp_bind_head()
90 nv_write_tmds(dev, dcbent->or, 1, 0x04, tmds04 ^ 0x08); in nv04_dfp_bind_head()
95 struct nv04_crtc_reg *crtcstate = nv04_display(dev)->mode_reg.crtc_reg; in nv04_dfp_disable()
100 * values programmed. delay is time for the vga stuff in nv04_dfp_disable()
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| /linux-6.12.1/drivers/gpu/drm/amd/include/ |
| D | atombios.h | 2 * Copyright 2006-2007 Advanced Micro Devices, Inc.
107 #define ATOM_SCALER_DISABLE 0 //For Fudo, it's bypass and auto-cengter & no replication
108 #define ATOM_SCALER_CENTER 1 //For Fudo, it's bypass and auto-center & auto replication
110 #define ATOM_SCALER_MULTI_EX 3 //For Fudo only, it's multi-tap mode only used to drive TV or CV,…
222 UCHAR uaFirmWareSignature[4]; //Signature to distinguish between Atombios and non-atombios,
245 UCHAR uaFirmWareSignature[4]; //Signature to distinguish between Atombios and non-atombios,
427 …ONG ulPointerReturnFlag:1; // BYTE_3[7]=1 - Return the pointer to the right Data Block; BYTE_…
433 …ONG ulPointerReturnFlag:1; // BYTE_3[7]=1 - Return the pointer to the right Data Block; BYTE_…
440 …ULONG ulClock; //When returen, it's the re-calculated clock based on given Fb_div Post_Di…
538 …UCHAR ucInputFlag; //Input Flags. ucInputFlag[0] - Strobe(1)/Performance(0)…
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| D | atomfirmware.h | 6 * Description header file of general definitions for OS and pre-OS video drivers
31 * If a change in VBIOS/Driver/Tool's interface is only needed for pre-SoC15 products, then the chan…
81 // define ASIC internal encoder id ( bit vector ), used for CRTC_SourceSel
115 ATOM_SCALER_DISABLE =0, /*scaler bypass mode, auto-center & no replication*/
116 ATOM_SCALER_CENTER =1, //For Fudo, it's bypass and auto-center & auto replication
202 #define BIOS_VERSION_PREFIX "ATOMBIOSBK-AMD"
245 …tom_string_def atom_bios_string; //Signature to distinguish between Atombios and non-atombios,
604 uint32_t maco_pwrlimit_mw; // bomaco mode power limit in unit of m-watt
605 uint32_t usb_pwrlimit_mw; // power limit when USB is enable in unit of m-watt
636 uint32_t maco_pwrlimit_mw; // bomaco mode power limit in unit of m-watt
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| /linux-6.12.1/drivers/gpu/drm/gma500/ |
| D | psb_intel_sdvo.c | 3 * Copyright © 2006-2007 Intel Corporation
53 #define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
54 #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
55 #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
56 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
105 * This is set if we're going to treat the device as TV-out.
108 * to decide this for us, the S-Video output on our HDMI+S-Video card
109 * shows up as RGB1 (VGA).
117 * This is set if we treat the device as HDMI, instead of DVI.
134 /* DDC bus used by this SDVO encoder */
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| /linux-6.12.1/drivers/gpu/drm/nouveau/ |
| D | nouveau_bios.c | 2 * Copyright 2005-2006 Erik Waling
4 * Copyright 2007-2009 Stuart Bennett
33 #include <linux/io-mapping.h>
43 #define BIOSLOG(sip, fmt, arg...) NV_DEBUG(sip->dev, fmt, ##arg)
69 if (bios->major_version < 5) /* pre BIT */ in clkcmptable()
75 compareclk = ROM16(bios->data[clktable + compare_record_len * i]); in clkcmptable()
77 if (bios->major_version < 5) { in clkcmptable()
78 uint8_t tmdssub = bios->data[clktable + 2 + compare_record_len * i]; in clkcmptable()
79 scriptptr = ROM16(bios->data[bios->init_script_tbls_ptr + tmdssub * 2]); in clkcmptable()
81 scriptptr = ROM16(bios->data[clktable + 2 + compare_record_len * i]); in clkcmptable()
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| /linux-6.12.1/include/drm/display/ |
| D | drm_dp.h | 38 * MST: Multistream Transport - part of DP 1.2a
49 /* bits per component for non-RAW */
180 # define DP_MAX_SUPPORTED_RATES 8 /* 16-bit little-endian */
388 * 0x80-0x8f describe downstream port capabilities, but there are two layouts
392 * DP interop v1.1a only VGA defines additional detail.
413 /* offset 1 for VGA is maximum megapixels per second / 8 */
414 /* offset 1 for DVI/HDMI is maximum TMDS clock in Mbps / 2.5 */
415 /* offset 2 for VGA/DVI/HDMI */
432 /* offset 3 for DVI */
443 * VESA DP-to-HDMI PCON Specification adds caps for colorspace
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/link/protocols/ |
| D | link_dp_capability.c | 55 link->ctx->logger
108 return (link->dpcd_caps.dongle_type >= DISPLAY_DONGLE_DP_VGA_CONVERTER) && in is_dp_active_dongle()
109 (link->dpcd_caps.dongle_type <= DISPLAY_DONGLE_DP_HDMI_CONVERTER); in is_dp_active_dongle()
114 return link->dpcd_caps.is_branch_dev; in is_dp_branch_device()
132 return -1; in translate_dpcd_max_bpc()
186 link_rate = LINK_RATE_LOW; // Rate_1 (RBR) - 1.62 Gbps/Lane in linkRateInKHzToLinkRateMultiplier()
189 link_rate = LINK_RATE_RATE_2; // Rate_2 - 2.16 Gbps/Lane in linkRateInKHzToLinkRateMultiplier()
192 link_rate = LINK_RATE_RATE_3; // Rate_3 - 2.43 Gbps/Lane in linkRateInKHzToLinkRateMultiplier()
195 link_rate = LINK_RATE_HIGH; // Rate_4 (HBR) - 2.70 Gbps/Lane in linkRateInKHzToLinkRateMultiplier()
198 link_rate = LINK_RATE_RBR2; // Rate_5 (RBR2)- 3.24 Gbps/Lane in linkRateInKHzToLinkRateMultiplier()
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