Lines Matching +full:vga +full:- +full:dvi +full:- +full:encoder
5 * Copyright 2007-2009 Stuart Bennett
58 * this does not give a correct answer for off-chip dvi, but there's no in nv04_dfp_get_bound_head()
61 int ramdac = (dcbent->or & DCB_OUTPUT_C) >> 2; in nv04_dfp_get_bound_head()
72 * Luckily we do know the values ;-) in nv04_dfp_bind_head()
78 int ramdac = (dcbent->or & DCB_OUTPUT_C) >> 2; in nv04_dfp_bind_head()
84 if (dcbent->type == DCB_OUTPUT_LVDS) in nv04_dfp_bind_head()
87 nv_write_tmds(dev, dcbent->or, 0, 0x04, tmds04); in nv04_dfp_bind_head()
90 nv_write_tmds(dev, dcbent->or, 1, 0x04, tmds04 ^ 0x08); in nv04_dfp_bind_head()
95 struct nv04_crtc_reg *crtcstate = nv04_display(dev)->mode_reg.crtc_reg; in nv04_dfp_disable()
100 * values programmed. delay is time for the vga stuff in nv04_dfp_disable()
113 void nv04_dfp_update_fp_control(struct drm_encoder *encoder, int mode) in nv04_dfp_update_fp_control() argument
115 struct drm_device *dev = encoder->dev; in nv04_dfp_update_fp_control()
121 nv_crtc = nouveau_crtc(encoder->crtc); in nv04_dfp_update_fp_control()
122 fpc = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index].fp_control; in nv04_dfp_update_fp_control()
129 *fpc = nv_crtc->dpms_saved_fp_control; in nv04_dfp_update_fp_control()
132 nv_crtc->fp_users |= 1 << nouveau_encoder(encoder)->dcb->index; in nv04_dfp_update_fp_control()
133 NVWriteRAMDAC(dev, nv_crtc->index, NV_PRAMDAC_FP_TG_CONTROL, *fpc); in nv04_dfp_update_fp_control()
135 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { in nv04_dfp_update_fp_control()
137 fpc = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index].fp_control; in nv04_dfp_update_fp_control()
139 nv_crtc->fp_users &= ~(1 << nouveau_encoder(encoder)->dcb->index); in nv04_dfp_update_fp_control()
140 if (!is_fpc_off(*fpc) && !nv_crtc->fp_users) { in nv04_dfp_update_fp_control()
141 nv_crtc->dpms_saved_fp_control = *fpc; in nv04_dfp_update_fp_control()
145 NVWriteRAMDAC(dev, nv_crtc->index, in nv04_dfp_update_fp_control()
152 static struct drm_encoder *get_tmds_slave(struct drm_encoder *encoder) in get_tmds_slave() argument
154 struct drm_device *dev = encoder->dev; in get_tmds_slave()
155 struct dcb_output *dcb = nouveau_encoder(encoder)->dcb; in get_tmds_slave()
158 if (dcb->type != DCB_OUTPUT_TMDS || dcb->location == DCB_LOC_ON_CHIP) in get_tmds_slave()
164 * always hard-wired to a reasonable configuration using straps, in get_tmds_slave()
171 list_for_each_entry(slave, &dev->mode_config.encoder_list, head) { in get_tmds_slave()
172 struct dcb_output *slave_dcb = nouveau_encoder(slave)->dcb; in get_tmds_slave()
174 if (slave_dcb->type == DCB_OUTPUT_TMDS && get_slave_funcs(slave) && in get_tmds_slave()
175 slave_dcb->tmdsconf.slave_addr == dcb->tmdsconf.slave_addr) in get_tmds_slave()
182 static bool nv04_dfp_mode_fixup(struct drm_encoder *encoder, in nv04_dfp_mode_fixup() argument
186 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); in nv04_dfp_mode_fixup()
190 if (!nv_connector->native_mode || in nv04_dfp_mode_fixup()
191 nv_connector->scaling_mode == DRM_MODE_SCALE_NONE || in nv04_dfp_mode_fixup()
192 mode->hdisplay > nv_connector->native_mode->hdisplay || in nv04_dfp_mode_fixup()
193 mode->vdisplay > nv_connector->native_mode->vdisplay) { in nv04_dfp_mode_fixup()
194 nv_encoder->mode = *adjusted_mode; in nv04_dfp_mode_fixup()
197 nv_encoder->mode = *nv_connector->native_mode; in nv04_dfp_mode_fixup()
198 adjusted_mode->clock = nv_connector->native_mode->clock; in nv04_dfp_mode_fixup()
207 struct nv04_mode_state *state = &nv04_display(dev)->mode_reg; in nv04_dfp_prepare_sel_clk()
208 uint32_t bits1618 = nv_encoder->dcb->or & DCB_OUTPUT_A ? 0x10000 : 0x40000; in nv04_dfp_prepare_sel_clk()
210 if (nv_encoder->dcb->location != DCB_LOC_ON_CHIP) in nv04_dfp_prepare_sel_clk()
218 state->sel_clk |= bits1618; in nv04_dfp_prepare_sel_clk()
220 state->sel_clk &= ~bits1618; in nv04_dfp_prepare_sel_clk()
232 * bits 8&10 seen on dual-link dvi outputs, purpose unknown (set by POST scripts) in nv04_dfp_prepare_sel_clk()
234 * and which bit-pair to use, is unclear on nv40 (for earlier cards, the fp table in nv04_dfp_prepare_sel_clk()
237 if (nv_encoder->dcb->type == DCB_OUTPUT_LVDS && nv04_display(dev)->saved_reg.sel_clk & 0xf0) { in nv04_dfp_prepare_sel_clk()
238 int shift = (nv04_display(dev)->saved_reg.sel_clk & 0x50) ? 0 : 1; in nv04_dfp_prepare_sel_clk()
240 state->sel_clk &= ~0xf0; in nv04_dfp_prepare_sel_clk()
241 state->sel_clk |= (head ? 0x40 : 0x10) << shift; in nv04_dfp_prepare_sel_clk()
245 static void nv04_dfp_prepare(struct drm_encoder *encoder) in nv04_dfp_prepare() argument
247 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); in nv04_dfp_prepare()
248 const struct drm_encoder_helper_funcs *helper = encoder->helper_private; in nv04_dfp_prepare()
249 struct drm_device *dev = encoder->dev; in nv04_dfp_prepare()
250 int head = nouveau_crtc(encoder->crtc)->index; in nv04_dfp_prepare()
251 struct nv04_crtc_reg *crtcstate = nv04_display(dev)->mode_reg.crtc_reg; in nv04_dfp_prepare()
255 helper->dpms(encoder, DRM_MODE_DPMS_OFF); in nv04_dfp_prepare()
262 if (nv_encoder->dcb->location == DCB_LOC_ON_CHIP) in nv04_dfp_prepare()
265 *cr_lcd |= (nv_encoder->dcb->or << 4) & 0x30; in nv04_dfp_prepare()
266 if (nv_encoder->dcb->type == DCB_OUTPUT_LVDS) in nv04_dfp_prepare()
280 static void nv04_dfp_mode_set(struct drm_encoder *encoder, in nv04_dfp_mode_set() argument
284 struct drm_device *dev = encoder->dev; in nv04_dfp_mode_set()
285 struct nvif_object *device = &nouveau_drm(dev)->client.device.object; in nv04_dfp_mode_set()
287 struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc); in nv04_dfp_mode_set()
288 struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index]; in nv04_dfp_mode_set()
289 struct nv04_crtc_reg *savep = &nv04_display(dev)->saved_reg.crtc_reg[nv_crtc->index]; in nv04_dfp_mode_set()
291 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); in nv04_dfp_mode_set()
292 struct drm_display_mode *output_mode = &nv_encoder->mode; in nv04_dfp_mode_set()
293 struct drm_connector *connector = &nv_connector->base; in nv04_dfp_mode_set()
294 const struct drm_framebuffer *fb = encoder->crtc->primary->fb; in nv04_dfp_mode_set()
297 NV_DEBUG(drm, "Output mode on CRTC %d:\n", nv_crtc->index); in nv04_dfp_mode_set()
301 regp->fp_horiz_regs[FP_DISPLAY_END] = output_mode->hdisplay - 1; in nv04_dfp_mode_set()
302 regp->fp_horiz_regs[FP_TOTAL] = output_mode->htotal - 1; in nv04_dfp_mode_set()
304 (output_mode->hsync_start - output_mode->hdisplay) >= in nv04_dfp_mode_set()
305 drm->vbios.digital_min_front_porch) in nv04_dfp_mode_set()
306 regp->fp_horiz_regs[FP_CRTC] = output_mode->hdisplay; in nv04_dfp_mode_set()
308 regp->fp_horiz_regs[FP_CRTC] = output_mode->hsync_start - drm->vbios.digital_min_front_porch - 1; in nv04_dfp_mode_set()
309 regp->fp_horiz_regs[FP_SYNC_START] = output_mode->hsync_start - 1; in nv04_dfp_mode_set()
310 regp->fp_horiz_regs[FP_SYNC_END] = output_mode->hsync_end - 1; in nv04_dfp_mode_set()
311 regp->fp_horiz_regs[FP_VALID_START] = output_mode->hskew; in nv04_dfp_mode_set()
312 regp->fp_horiz_regs[FP_VALID_END] = output_mode->hdisplay - 1; in nv04_dfp_mode_set()
314 regp->fp_vert_regs[FP_DISPLAY_END] = output_mode->vdisplay - 1; in nv04_dfp_mode_set()
315 regp->fp_vert_regs[FP_TOTAL] = output_mode->vtotal - 1; in nv04_dfp_mode_set()
316 regp->fp_vert_regs[FP_CRTC] = output_mode->vtotal - 5 - 1; in nv04_dfp_mode_set()
317 regp->fp_vert_regs[FP_SYNC_START] = output_mode->vsync_start - 1; in nv04_dfp_mode_set()
318 regp->fp_vert_regs[FP_SYNC_END] = output_mode->vsync_end - 1; in nv04_dfp_mode_set()
319 regp->fp_vert_regs[FP_VALID_START] = 0; in nv04_dfp_mode_set()
320 regp->fp_vert_regs[FP_VALID_END] = output_mode->vdisplay - 1; in nv04_dfp_mode_set()
323 regp->fp_control = NV_PRAMDAC_FP_TG_CONTROL_DISPEN_POS | in nv04_dfp_mode_set()
324 (savep->fp_control & (1 << 26 | NV_PRAMDAC_FP_TG_CONTROL_READ_PROG)); in nv04_dfp_mode_set()
327 if (output_mode->flags & DRM_MODE_FLAG_PVSYNC) in nv04_dfp_mode_set()
328 regp->fp_control |= NV_PRAMDAC_FP_TG_CONTROL_VSYNC_POS; in nv04_dfp_mode_set()
329 if (output_mode->flags & DRM_MODE_FLAG_PHSYNC) in nv04_dfp_mode_set()
330 regp->fp_control |= NV_PRAMDAC_FP_TG_CONTROL_HSYNC_POS; in nv04_dfp_mode_set()
332 if (nv_connector->scaling_mode == DRM_MODE_SCALE_NONE || in nv04_dfp_mode_set()
333 nv_connector->scaling_mode == DRM_MODE_SCALE_CENTER) /* panel handles it */ in nv04_dfp_mode_set()
334 regp->fp_control |= NV_PRAMDAC_FP_TG_CONTROL_MODE_CENTER; in nv04_dfp_mode_set()
335 else if (adjusted_mode->hdisplay == output_mode->hdisplay && in nv04_dfp_mode_set()
336 adjusted_mode->vdisplay == output_mode->vdisplay) /* native mode */ in nv04_dfp_mode_set()
337 regp->fp_control |= NV_PRAMDAC_FP_TG_CONTROL_MODE_NATIVE; in nv04_dfp_mode_set()
339 regp->fp_control |= NV_PRAMDAC_FP_TG_CONTROL_MODE_SCALE; in nv04_dfp_mode_set()
341 regp->fp_control |= NV_PRAMDAC_FP_TG_CONTROL_WIDTH_12; in nv04_dfp_mode_set()
342 if (nv_encoder->dcb->location != DCB_LOC_ON_CHIP && in nv04_dfp_mode_set()
343 output_mode->clock > 165000) in nv04_dfp_mode_set()
344 regp->fp_control |= (2 << 24); in nv04_dfp_mode_set()
345 if (nv_encoder->dcb->type == DCB_OUTPUT_LVDS) { in nv04_dfp_mode_set()
347 if (nv_connector->edid && in nv04_dfp_mode_set()
348 nv_connector->type == DCB_CONNECTOR_LVDS_SPWG) { in nv04_dfp_mode_set()
349 duallink = (((u8 *)nv_connector->edid)[121] == 2); in nv04_dfp_mode_set()
351 nouveau_bios_parse_lvds_table(dev, output_mode->clock, in nv04_dfp_mode_set()
356 regp->fp_control |= (8 << 28); in nv04_dfp_mode_set()
358 if (output_mode->clock > 165000) in nv04_dfp_mode_set()
359 regp->fp_control |= (8 << 28); in nv04_dfp_mode_set()
361 regp->fp_debug_0 = NV_PRAMDAC_FP_DEBUG_0_YWEIGHT_ROUND | in nv04_dfp_mode_set()
370 regp->fp_debug_1 = 0; in nv04_dfp_mode_set()
372 regp->fp_debug_2 = 0; in nv04_dfp_mode_set()
375 mode_ratio = (1 << 12) * adjusted_mode->hdisplay / adjusted_mode->vdisplay; in nv04_dfp_mode_set()
376 panel_ratio = (1 << 12) * output_mode->hdisplay / output_mode->vdisplay; in nv04_dfp_mode_set()
379 if (nv_connector->scaling_mode == DRM_MODE_SCALE_ASPECT && in nv04_dfp_mode_set()
389 scale = (1 << 12) * adjusted_mode->vdisplay / output_mode->vdisplay; in nv04_dfp_mode_set()
390 regp->fp_debug_1 = NV_PRAMDAC_FP_DEBUG_1_XSCALE_TESTMODE_ENABLE | in nv04_dfp_mode_set()
394 diff = output_mode->hdisplay - in nv04_dfp_mode_set()
395 output_mode->vdisplay * mode_ratio / (1 << 12); in nv04_dfp_mode_set()
396 regp->fp_horiz_regs[FP_VALID_START] += diff / 2; in nv04_dfp_mode_set()
397 regp->fp_horiz_regs[FP_VALID_END] -= diff / 2; in nv04_dfp_mode_set()
405 scale = (1 << 12) * adjusted_mode->hdisplay / output_mode->hdisplay; in nv04_dfp_mode_set()
406 regp->fp_debug_1 = NV_PRAMDAC_FP_DEBUG_1_YSCALE_TESTMODE_ENABLE | in nv04_dfp_mode_set()
410 diff = output_mode->vdisplay - in nv04_dfp_mode_set()
411 (1 << 12) * output_mode->hdisplay / mode_ratio; in nv04_dfp_mode_set()
412 regp->fp_vert_regs[FP_VALID_START] += diff / 2; in nv04_dfp_mode_set()
413 regp->fp_vert_regs[FP_VALID_END] -= diff / 2; in nv04_dfp_mode_set()
418 if ((nv_connector->dithering_mode == DITHERING_MODE_ON) || in nv04_dfp_mode_set()
419 (nv_connector->dithering_mode == DITHERING_MODE_AUTO && in nv04_dfp_mode_set()
420 fb->format->depth > connector->display_info.bpc * 3)) { in nv04_dfp_mode_set()
421 if (drm->client.device.info.chipset == 0x11) in nv04_dfp_mode_set()
422 regp->dither = savep->dither | 0x00010000; in nv04_dfp_mode_set()
425 regp->dither = savep->dither | 0x00000001; in nv04_dfp_mode_set()
427 regp->dither_regs[i] = 0xe4e4e4e4; in nv04_dfp_mode_set()
428 regp->dither_regs[i + 3] = 0x44444444; in nv04_dfp_mode_set()
432 if (drm->client.device.info.chipset != 0x11) { in nv04_dfp_mode_set()
436 regp->dither_regs[i] = savep->dither_regs[i]; in nv04_dfp_mode_set()
437 regp->dither_regs[i + 3] = savep->dither_regs[i + 3]; in nv04_dfp_mode_set()
440 regp->dither = savep->dither; in nv04_dfp_mode_set()
443 regp->fp_margin_color = 0; in nv04_dfp_mode_set()
446 static void nv04_dfp_commit(struct drm_encoder *encoder) in nv04_dfp_commit() argument
448 struct drm_device *dev = encoder->dev; in nv04_dfp_commit()
450 const struct drm_encoder_helper_funcs *helper = encoder->helper_private; in nv04_dfp_commit()
451 struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc); in nv04_dfp_commit()
452 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); in nv04_dfp_commit()
453 struct dcb_output *dcbe = nv_encoder->dcb; in nv04_dfp_commit()
454 int head = nouveau_crtc(encoder->crtc)->index; in nv04_dfp_commit()
457 if (dcbe->type == DCB_OUTPUT_TMDS) in nv04_dfp_commit()
458 run_tmds_table(dev, dcbe, head, nv_encoder->mode.clock); in nv04_dfp_commit()
459 else if (dcbe->type == DCB_OUTPUT_LVDS) in nv04_dfp_commit()
460 call_lvds_script(dev, dcbe, head, LVDS_RESET, nv_encoder->mode.clock); in nv04_dfp_commit()
464 nv04_display(dev)->mode_reg.crtc_reg[head].fp_control = in nv04_dfp_commit()
468 if (drm->client.device.info.chipset < 0x44) in nv04_dfp_commit()
469 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + nv04_dac_output_offset(encoder), 0xf0000000); in nv04_dfp_commit()
471 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + nv04_dac_output_offset(encoder), 0x00100000); in nv04_dfp_commit()
474 slave_encoder = get_tmds_slave(encoder); in nv04_dfp_commit()
476 get_slave_funcs(slave_encoder)->mode_set( in nv04_dfp_commit()
477 slave_encoder, &nv_encoder->mode, &nv_encoder->mode); in nv04_dfp_commit()
479 helper->dpms(encoder, DRM_MODE_DPMS_ON); in nv04_dfp_commit()
482 nv04_encoder_get_connector(nv_encoder)->base.name, in nv04_dfp_commit()
483 nv_crtc->index, '@' + ffs(nv_encoder->dcb->or)); in nv04_dfp_commit()
486 static void nv04_dfp_update_backlight(struct drm_encoder *encoder, int mode) in nv04_dfp_update_backlight() argument
489 struct drm_device *dev = encoder->dev; in nv04_dfp_update_backlight()
490 struct nvif_object *device = &nouveau_drm(dev)->client.device.object; in nv04_dfp_update_backlight()
491 struct pci_dev *pdev = to_pci_dev(dev->dev); in nv04_dfp_update_backlight()
496 if (pdev->device == 0x0174 || pdev->device == 0x0179 || in nv04_dfp_update_backlight()
497 pdev->device == 0x0189 || pdev->device == 0x0329) { in nv04_dfp_update_backlight()
514 static void nv04_lvds_dpms(struct drm_encoder *encoder, int mode) in nv04_lvds_dpms() argument
516 struct drm_device *dev = encoder->dev; in nv04_lvds_dpms()
517 struct drm_crtc *crtc = encoder->crtc; in nv04_lvds_dpms()
519 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); in nv04_lvds_dpms()
520 bool was_powersaving = is_powersaving_dpms(nv_encoder->last_dpms); in nv04_lvds_dpms()
522 if (nv_encoder->last_dpms == mode) in nv04_lvds_dpms()
524 nv_encoder->last_dpms = mode; in nv04_lvds_dpms()
526 NV_DEBUG(drm, "Setting dpms mode %d on lvds encoder (output %d)\n", in nv04_lvds_dpms()
527 mode, nv_encoder->dcb->index); in nv04_lvds_dpms()
532 if (nv_encoder->dcb->lvdsconf.use_power_scripts) { in nv04_lvds_dpms()
536 int head = crtc ? nouveau_crtc(crtc)->index : in nv04_lvds_dpms()
537 nv04_dfp_get_bound_head(dev, nv_encoder->dcb); in nv04_lvds_dpms()
540 call_lvds_script(dev, nv_encoder->dcb, head, in nv04_lvds_dpms()
541 LVDS_PANEL_ON, nv_encoder->mode.clock); in nv04_lvds_dpms()
544 * disconnected LVDS encoder there is no native_mode in nv04_lvds_dpms()
546 call_lvds_script(dev, nv_encoder->dcb, head, in nv04_lvds_dpms()
550 nv04_dfp_update_backlight(encoder, mode); in nv04_lvds_dpms()
551 nv04_dfp_update_fp_control(encoder, mode); in nv04_lvds_dpms()
554 nv04_dfp_prepare_sel_clk(dev, nv_encoder, nouveau_crtc(crtc)->index); in nv04_lvds_dpms()
556 nv04_display(dev)->mode_reg.sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK); in nv04_lvds_dpms()
557 nv04_display(dev)->mode_reg.sel_clk &= ~0xf0; in nv04_lvds_dpms()
559 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, nv04_display(dev)->mode_reg.sel_clk); in nv04_lvds_dpms()
562 static void nv04_tmds_dpms(struct drm_encoder *encoder, int mode) in nv04_tmds_dpms() argument
564 struct nouveau_drm *drm = nouveau_drm(encoder->dev); in nv04_tmds_dpms()
565 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); in nv04_tmds_dpms()
567 if (nv_encoder->last_dpms == mode) in nv04_tmds_dpms()
569 nv_encoder->last_dpms = mode; in nv04_tmds_dpms()
571 NV_DEBUG(drm, "Setting dpms mode %d on tmds encoder (output %d)\n", in nv04_tmds_dpms()
572 mode, nv_encoder->dcb->index); in nv04_tmds_dpms()
574 nv04_dfp_update_backlight(encoder, mode); in nv04_tmds_dpms()
575 nv04_dfp_update_fp_control(encoder, mode); in nv04_tmds_dpms()
578 static void nv04_dfp_save(struct drm_encoder *encoder) in nv04_dfp_save() argument
580 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); in nv04_dfp_save()
581 struct drm_device *dev = encoder->dev; in nv04_dfp_save()
584 nv_encoder->restore.head = in nv04_dfp_save()
585 nv04_dfp_get_bound_head(dev, nv_encoder->dcb); in nv04_dfp_save()
588 static void nv04_dfp_restore(struct drm_encoder *encoder) in nv04_dfp_restore() argument
590 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); in nv04_dfp_restore()
591 struct drm_device *dev = encoder->dev; in nv04_dfp_restore()
592 int head = nv_encoder->restore.head; in nv04_dfp_restore()
594 if (nv_encoder->dcb->type == DCB_OUTPUT_LVDS) { in nv04_dfp_restore()
598 if (connector && connector->native_mode) in nv04_dfp_restore()
599 call_lvds_script(dev, nv_encoder->dcb, head, in nv04_dfp_restore()
601 connector->native_mode->clock); in nv04_dfp_restore()
603 } else if (nv_encoder->dcb->type == DCB_OUTPUT_TMDS) { in nv04_dfp_restore()
605 (&nv04_display(dev)->saved_reg.crtc_reg[head].pllvals); in nv04_dfp_restore()
607 run_tmds_table(dev, nv_encoder->dcb, head, clock); in nv04_dfp_restore()
610 nv_encoder->last_dpms = NV_DPMS_CLEARED; in nv04_dfp_restore()
613 static void nv04_dfp_destroy(struct drm_encoder *encoder) in nv04_dfp_destroy() argument
615 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); in nv04_dfp_destroy()
617 if (get_slave_funcs(encoder)) in nv04_dfp_destroy()
618 get_slave_funcs(encoder)->destroy(encoder); in nv04_dfp_destroy()
620 drm_encoder_cleanup(encoder); in nv04_dfp_destroy()
624 static void nv04_tmds_slave_init(struct drm_encoder *encoder) in nv04_tmds_slave_init() argument
626 struct drm_device *dev = encoder->dev; in nv04_tmds_slave_init()
627 struct dcb_output *dcb = nouveau_encoder(encoder)->dcb; in nv04_tmds_slave_init()
635 .addr = (dcb->tmdsconf.slave_addr == 0x7 ? 0x3a : 0x38), in nv04_tmds_slave_init()
645 if (!nv_gf4_disp_arch(dev) || !bus || get_tmds_slave(encoder)) in nv04_tmds_slave_init()
652 drm_i2c_encoder_init(dev, to_encoder_slave(encoder), in nv04_tmds_slave_init()
653 &bus->i2c, &info[type].dev); in nv04_tmds_slave_init()
683 struct drm_encoder *encoder; in nv04_dfp_create() local
686 switch (entry->type) { in nv04_dfp_create()
696 return -EINVAL; in nv04_dfp_create()
701 return -ENOMEM; in nv04_dfp_create()
703 nv_encoder->enc_save = nv04_dfp_save; in nv04_dfp_create()
704 nv_encoder->enc_restore = nv04_dfp_restore; in nv04_dfp_create()
706 encoder = to_drm_encoder(nv_encoder); in nv04_dfp_create()
708 nv_encoder->dcb = entry; in nv04_dfp_create()
709 nv_encoder->or = ffs(entry->or) - 1; in nv04_dfp_create()
711 drm_encoder_init(connector->dev, encoder, &nv04_dfp_funcs, type, NULL); in nv04_dfp_create()
712 drm_encoder_helper_add(encoder, helper); in nv04_dfp_create()
714 encoder->possible_crtcs = entry->heads; in nv04_dfp_create()
715 encoder->possible_clones = 0; in nv04_dfp_create()
717 if (entry->type == DCB_OUTPUT_TMDS && in nv04_dfp_create()
718 entry->location != DCB_LOC_ON_CHIP) in nv04_dfp_create()
719 nv04_tmds_slave_init(encoder); in nv04_dfp_create()
721 drm_connector_attach_encoder(connector, encoder); in nv04_dfp_create()