Searched +full:uniphier +full:- +full:system +full:- +full:bus (Results 1 – 25 of 25) sorted by relevance
/linux-6.12.1/Documentation/devicetree/bindings/bus/ |
D | socionext,uniphier-system-bus.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/bus/socionext,uniphier-system-bus.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: UniPhier System Bus 10 The UniPhier System Bus is an external bus that connects on-board devices to 11 the UniPhier SoC. It is a simple (semi-)parallel bus with address, data, and 14 Before any access to the bus, the bus controller must be configured; the bus 16 within each bank to the CPU-viewed address. The needed setup includes the 18 be optimized for faster bus access. [all …]
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/linux-6.12.1/arch/arm/boot/dts/socionext/ |
D | uniphier-ld4.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 3 // Device Tree Source for UniPhier LD4 SoC 5 // Copyright (C) 2015-2016 Socionext Inc. 8 #include <dt-bindings/gpio/uniphier-gpio.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 compatible = "socionext,uniphier-ld4"; 13 #address-cells = <1>; 14 #size-cells = <1>; 17 #address-cells = <1>; 18 #size-cells = <0>; [all …]
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D | uniphier-sld8.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 3 // Device Tree Source for UniPhier sLD8 SoC 5 // Copyright (C) 2015-2016 Socionext Inc. 8 #include <dt-bindings/gpio/uniphier-gpio.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 compatible = "socionext,uniphier-sld8"; 13 #address-cells = <1>; 14 #size-cells = <1>; 17 #address-cells = <1>; 18 #size-cells = <0>; [all …]
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D | uniphier-pro5.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 3 // Device Tree Source for UniPhier Pro5 SoC 5 // Copyright (C) 2015-2016 Socionext Inc. 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 compatible = "socionext,uniphier-pro5"; 12 #address-cells = <1>; 13 #size-cells = <1>; 16 #address-cells = <1>; 17 #size-cells = <0>; 21 compatible = "arm,cortex-a9"; [all …]
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D | uniphier-pro4.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 3 // Device Tree Source for UniPhier Pro4 SoC 5 // Copyright (C) 2015-2016 Socionext Inc. 8 #include <dt-bindings/gpio/uniphier-gpio.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 compatible = "socionext,uniphier-pro4"; 13 #address-cells = <1>; 14 #size-cells = <1>; 17 #address-cells = <1>; 18 #size-cells = <0>; [all …]
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D | uniphier-pxs2.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 3 // Device Tree Source for UniPhier PXs2 SoC 5 // Copyright (C) 2015-2016 Socionext Inc. 8 #include <dt-bindings/gpio/uniphier-gpio.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/thermal/thermal.h> 13 compatible = "socionext,uniphier-pxs2"; 14 #address-cells = <1>; 15 #size-cells = <1>; 18 #address-cells = <1>; [all …]
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D | uniphier-pinctrl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 3 // Device Tree Source for UniPhier SoCs default pinctrl settings 5 // Copyright (C) 2015-2017 Socionext Inc. 59 pinctrl_ether_mii: ether-mii { 64 pinctrl_ether_rgmii: ether-rgmii { 69 pinctrl_ether_rmii: ether-rmii { 74 pinctrl_ether1_rgmii: ether1-rgmii { 79 pinctrl_ether1_rmii: ether1-rmii { 139 pinctrl_sd_uhs: sd-uhs { 169 pinctrl_system_bus: system-bus { [all …]
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/linux-6.12.1/arch/arm64/boot/dts/socionext/ |
D | uniphier-ld11.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 3 // Device Tree Source for UniPhier LD11 SoC 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/gpio/uniphier-gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 compatible = "socionext,uniphier-ld11"; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 interrupt-parent = <&gic>; 19 #address-cells = <2>; [all …]
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D | uniphier-pxs3.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 3 // Device Tree Source for UniPhier PXs3 SoC 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/gpio/uniphier-gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/thermal/thermal.h> 14 compatible = "socionext,uniphier-pxs3"; 15 #address-cells = <2>; 16 #size-cells = <2>; 17 interrupt-parent = <&gic>; [all …]
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D | uniphier-ld20.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 3 // Device Tree Source for UniPhier LD20 SoC 5 // Copyright (C) 2015-2016 Socionext Inc. 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/gpio/uniphier-gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/thermal/thermal.h> 14 compatible = "socionext,uniphier-ld20"; 15 #address-cells = <2>; 16 #size-cells = <2>; [all …]
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/linux-6.12.1/drivers/bus/ |
D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0 3 # Bus Devices 6 menu "Bus devices" 24 bool "ARM Integrator Logic Module bus" 29 Say y here to enable support for the ARM Logic Module bus 33 tristate "Broadcom STB GISB bus arbiter" 37 Driver for the Broadcom Set Top Box System-on-a-chip internal bus 39 and internal bus master decoding. 42 bool "Baikal-T1 APB-bus driver" 46 Baikal-T1 AXI-APB bridge is used to access the SoC subsystem CSRs. [all …]
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D | uniphier-system-bus.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 14 /* System Bus Controller registers */ 43 dev_dbg(priv->dev, in uniphier_system_bus_add_bank() 47 if (bank >= ARRAY_SIZE(priv->bank)) { in uniphier_system_bus_add_bank() 48 dev_err(priv->dev, "unsupported bank number %d\n", bank); in uniphier_system_bus_add_bank() 49 return -EINVAL; in uniphier_system_bus_add_bank() 52 if (priv->bank[bank].base || priv->bank[bank].end) { in uniphier_system_bus_add_bank() 53 dev_err(priv->dev, in uniphier_system_bus_add_bank() 55 return -EINVAL; in uniphier_system_bus_add_bank() 59 dev_err(priv->dev, "base address %llx is too high\n", paddr); in uniphier_system_bus_add_bank() [all …]
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D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 3 # Makefile for the bus drivers. 6 # Interconnect bus drivers for ARM platforms 7 obj-$(CONFIG_ARM_CCI) += arm-cci.o 8 obj-$(CONFIG_ARM_INTEGRATOR_LM) += arm-integrator-lm.o 9 obj-$(CONFIG_HISILICON_LPC) += hisi_lpc.o 10 obj-$(CONFIG_BRCMSTB_GISB_ARB) += brcmstb_gisb.o 11 obj-$(CONFIG_MOXTET) += moxtet.o 13 # DPAA2 fsl-mc bus 14 obj-$(CONFIG_FSL_MC_BUS) += fsl-mc/ [all …]
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/linux-6.12.1/drivers/i2c/busses/ |
D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 6 menu "I2C Hardware Bus support" 16 for Cypress CCGx Type-C controller. Individual bus drivers 25 controller is part of the 7101 device, which is an ACPI-compliant 29 will be called i2c-ali1535. 37 controller is part of the 7101 device, which is an ACPI-compliant 41 will be called i2c-ali1563. 51 will be called i2c-ali15x3. 63 will be called i2c-amd756. 70 S4882 motherboard. On this 4-CPU board, the SMBus is multiplexed [all …]
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D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 3 # Makefile for the i2c bus drivers. 7 obj-$(CONFIG_I2C_SCMI) += i2c-scmi.o 10 obj-$(CONFIG_I2C_CCGX_UCSI) += i2c-ccgx-ucsi.o 13 obj-$(CONFIG_I2C_ALI1535) += i2c-ali1535.o 14 obj-$(CONFIG_I2C_ALI1563) += i2c-ali1563.o 15 obj-$(CONFIG_I2C_ALI15X3) += i2c-ali15x3.o 16 obj-$(CONFIG_I2C_AMD756) += i2c-amd756.o 17 obj-$(CONFIG_I2C_AMD756_S4882) += i2c-amd756-s4882.o 18 obj-$(CONFIG_I2C_AMD8111) += i2c-amd8111.o [all …]
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/linux-6.12.1/drivers/spi/ |
D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 13 dynamic device discovery; some are even write-only or read-only. 17 chips, analog to digital (and d-to-a) converters, and more. 44 If your system has an master-capable SPI controller (which 56 by providing a high-level interface to send memory-like commands. 66 This enables support for SPI-NAND mode on the Airoha NAND 68 is implemented as a SPI-MEM controller. 84 tristate "DFL bus driver for Altera SPI Controller" 88 This is a Device Feature List (DFL) bus driver for the 155 supports spi-mem interface. [all …]
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D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 6 ccflags-$(CONFIG_SPI_DEBUG) := -DDEBUG 8 # small core, mostly translating board-specific 10 obj-$(CONFIG_SPI_MASTER) += spi.o 11 obj-$(CONFIG_SPI_MEM) += spi-mem.o 12 obj-$(CONFIG_SPI_MUX) += spi-mux.o 13 obj-$(CONFIG_SPI_SPIDEV) += spidev.o 14 obj-$(CONFIG_SPI_LOOPBACK_TEST) += spi-loopback-test.o 16 # SPI master controller drivers (bus) 17 obj-$(CONFIG_SPI_AIROHA_SNFI) += spi-airoha-snfi.o [all …]
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/linux-6.12.1/arch/arm/ |
D | Kconfig.platforms | 1 # SPDX-License-Identifier: GPL-2.0-only 11 # https://github.com/llvm/llvm-project/issues/50764 19 # https://github.com/llvm/llvm-project/issues/50764 43 bool "ARMv7 based platforms (Cortex-A, PJ4, Scorpion, Krait)" 103 The MOXA ART SoC is based on a Faraday FA526 ARMv4 32-bit 104 192 MHz CPU with MMU and 16KB/8KB D/I-cache (UC-7112-LX). 105 Used on models UC-7101, UC-7112/UC-7110, IA240/IA241, IA3341. 110 bool "MOXA UC-7112-LX" 114 UC-7112-LX embedded computer. 119 bool "TI-NSPIRE based" [all …]
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/linux-6.12.1/drivers/tty/serial/8250/ |
D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0 16 servers, or users that have one of the various bus mice instead of a 23 non-standard serial ports, since the configuration information will 28 the X window system, try running gpm first. 51 If you did not notice yet and/or you have userspace from pre-3.7, it 94 system console (the system console is the device which receives all 100 (/dev/tty0) will still be used as the system console by default, but 108 system console. 146 Note that serial ports on NetMos 9835 Multi-I/O cards are handled 168 Say Y here to enable support for 16-bit PCMCIA serial devices, [all …]
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/linux-6.12.1/drivers/irqchip/ |
D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 69 The maximum number of VICs available in the system, for 119 tristate "Broadcom STB 7038-style L1/L2 interrupt controller driver" 127 tristate "Broadcom STB 7120-style L2 interrupt controller driver" 180 will be called irq-lan966x-oic. 221 bool "J-Core integrated AIC" if COMPILE_TEST 225 Support for the J-Core integrated AIC. 236 interrupt pins, as found on SH/R-Mobile and R-Car Gen1 SoCs. 239 bool "Renesas R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} IRQC support" if COMPILE_TEST 244 devices, as found on R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} SoCs. [all …]
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/linux-6.12.1/drivers/mmc/host/ |
D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 76 also need to enable an appropriate bus interface. 93 and performing I/O to a SDHCI controller through a bus that 94 implements a hardware byte swapper using a 32-bit datum. 102 tristate "SDHCI support on PCI bus" 123 disabled, it will steal the MMC cards away - rendering them 177 also need to enable an appropriate bus interface. 473 with 1, 4, and 8 bit bus widths. 495 MOXA provides one multi-functional card reader which can 496 be found on some embedded hardware such as UC-7112-LX. [all …]
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/linux-6.12.1/drivers/clk/ |
D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0 50 This driver supports the HSDK core, system, ddr, tunnel and hdmi PLLs 59 Low-Noise JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs 88 These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each. 98 multi-function device has one fixed-rate oscillator, clocked 129 be pre-programmed to support other configurations and features not yet 178 This driver supports TI CDCE706 programmable 3-PLL clock synthesizer. 196 For example, the CDCE925 contains two PLLs with spread-spectrum 206 tristate "Clock driver for CS2000 Fractional-N Clock Synthesizer & Clock Multiplier" 213 bool "Clock driver for Airoha EN7523 SoC system clocks" [all …]
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/linux-6.12.1/drivers/regulator/ |
D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 38 managed regulators and simple non-configurable regulators. 64 the netlink mechanism. User-space applications can subscribe to these events 65 for real-time updates on various regulator events. 75 They provide two I2C-controlled DC/DC step-down converters with 101 tristate "Active-semi act8865 voltage regulator" 106 This driver controls a active-semi act8865 voltage output 107 regulator via I2C bus. 110 tristate "Active-semi ACT8945A voltage regulator" 113 This driver controls a active-semi ACT8945A voltage regulator [all …]
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/linux-6.12.1/drivers/gpio/ |
D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 47 this symbol, but new drivers should use the generic gpio-regmap 57 non-sleeping contexts. They can make bitbanged serial protocols 127 Enables support for the idio-16 library functions. The idio-16 library 129 ACCES IDIO-16 family such as the 104-IDIO-16 and the PCI-IDIO-16. 131 If built as a module its name will be gpio-idio-16. 137 tristate "GPIO driver for 74xx-ICs with MMIO access" 141 Say yes here to support GPIO functionality for 74xx-compatible ICs 158 If driver is built as a module it will be called gpio-altera. 319 tristate "Generic memory-mapped GPIO controller support (MMIO platform device)" [all …]
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/linux-6.12.1/ |
D | MAINTAINERS | 5 --------------------------------------------------- 19 it has been replaced by a better system and you 21 W: *Web-page* with status/info 22 Q: *Patchwork* web based patch tracking system site 23 B: URI for where to file *bugs*. A web-page with detailed bug 28 patches to the given subsystem. This is either an in-tree file, 29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst 46 N: [^a-z]tegra all files whose path contains tegra 64 ---------------- 83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS) [all …]
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