/linux-6.12.1/Documentation/devicetree/bindings/ata/ |
D | baikal,bt1-ahci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/ata/baikal,bt1-ahci.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Baikal-T1 SoC AHCI SATA controller 10 - Serge Semin <fancer.lancer@gmail.com> 13 AHCI SATA controller embedded into the Baikal-T1 SoC is based on the 14 DWC AHCI SATA v4.10a IP-core. 17 - $ref: snps,dwc-ahci-common.yaml# 21 const: baikal,bt1-ahci [all …]
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D | snps,dwc-ahci-common.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/ata/snps,dwc-ahci-common.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Serge Semin <fancer.lancer@gmail.com> 19 - $ref: ahci-common.yaml# 31 PM-alive clock, RxOOB detection clock, embedded PHYs reference (Rx/Tx) 36 clock-names: 41 - description: Application APB/AHB/AXI BIU clock 43 - pclk [all …]
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D | snps,dwc-ahci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/ata/snps,dwc-ahci.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Serge Semin <fancer.lancer@gmail.com> 20 - snps,dwc-ahci 21 - snps,spear-ahci 23 - compatible 26 - $ref: snps,dwc-ahci-common.yaml# 31 - description: Synopsys AHCI SATA-compatible devices [all …]
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D | rockchip,dwc-ahci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/ata/rockchip,dwc-ahci.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Serge Semin <fancer.lancer@gmail.com> 22 - rockchip,rk3568-dwc-ahci 23 - rockchip,rk3588-dwc-ahci 25 - compatible 30 - enum: 31 - rockchip,rk3568-dwc-ahci [all …]
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/linux-6.12.1/drivers/net/wireless/ath/ath5k/ |
D | desc.c | 2 * Copyright (c) 2004-2008 Reyk Floeter <reyk@openbsd.org> 3 * Copyright (c) 2006-2008 Nick Kossifidis <mickflemm@gmail.com> 4 * Copyright (c) 2007-2008 Pavel Roskin <proski@gnu.org> 34 * Here we handle the processing of the low-level hw descriptors 35 * that hw reads and writes via DMA for each TX and RX attempt (that means 36 * we can also have descriptors for failed TX/RX tries). We have two kind of 37 * descriptors for RX and TX, control descriptors tell the hw how to send or 49 * TX Control descriptors * 53 * ath5k_hw_setup_2word_tx_desc() - Initialize a 2-word tx control descriptor 60 * @tx_power: Tx power in 0.5dB steps [all …]
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/linux-6.12.1/arch/arm/boot/dts/st/ |
D | spear1310-evb.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 8 /dts-v1/; 13 compatible = "st,spear1310-evb", "st,spear1310"; 14 #address-cells = <1>; 15 #size-cells = <1>; 23 pinctrl-names = "default"; 24 pinctrl-0 = <&state_default>; 63 smi-pmx { 127 label = "u-boot"; 149 compatible = "gpio-keys"; [all …]
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D | spear1340-evb.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 8 /dts-v1/; 13 compatible = "st,spear1340-evb", "st,spear1340"; 14 #address-cells = <1>; 15 #size-cells = <1>; 23 pinctrl-names = "default"; 24 pinctrl-0 = <&state_default>; 47 spdif-in { 51 spdif-out { 59 smi-pmx { [all …]
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/linux-6.12.1/drivers/input/touchscreen/ |
D | ads7846.c | 1 // SPDX-License-Identifier: GPL-2.0-only 10 * - corgi_ts.c 11 * Copyright (C) 2004-2005 Richard Purdie 12 * - omap_ts.[hc], ads7846.h, ts_osk.c 39 * Support for ads7843 tested on Atmel at91sam926x-EK. 53 * note. The strength of filtering can be set in the board-* specific 76 * driver is used with DMA-based SPI controllers (like atmel_spi) on 77 * systems where main memory is not DMA-coherent (most non-x86 boards). 86 struct ads7846_buf *tx; member 152 /* leave chip selected when we're done, for quicker re-select? */ [all …]
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/linux-6.12.1/drivers/media/cec/core/ |
D | cec-pin.c | 1 // SPDX-License-Identifier: GPL-2.0-only 10 #include <media/cec-pin.h> 11 #include "cec-pin-priv.h" 61 /* Data bits are 0-7, EOM is bit 8 and ACK is bit 9 */ 73 { "Tx Wait", CEC_TIM_SAMPLE }, 74 { "Tx Wait for High", CEC_TIM_IDLE_SAMPLE }, 75 { "Tx Start Bit Low", CEC_TIM_START_BIT_LOW }, 76 { "Tx Start Bit High", CEC_TIM_START_BIT_TOTAL - CEC_TIM_START_BIT_LOW }, 77 { "Tx Start Bit High Short", CEC_TIM_START_BIT_TOTAL_SHORT - CEC_TIM_START_BIT_LOW }, 78 { "Tx Start Bit High Long", CEC_TIM_START_BIT_TOTAL_LONG - CEC_TIM_START_BIT_LOW }, [all …]
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/linux-6.12.1/arch/arm64/boot/dts/qcom/ |
D | sc7280-crd-r3.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 8 /dts-v1/; 10 #include "sc7280-idp.dtsi" 11 #include "sc7280-idp-ec-h1.dtsi" 14 model = "Qualcomm Technologies, Inc. sc7280 CRD platform (rev3 - 4)"; 15 compatible = "qcom,sc7280-crd", 16 "google,hoglin-rev3", "google,hoglin-rev4", 17 "google,piglin-rev3", "google,piglin-rev4", 25 stdout-path = "serial0:115200n8"; 30 regulators-2 { [all …]
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D | sc7280-qcard.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 14 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h> 15 #include <dt-bindings/iio/qcom,spmi-adc7-pmr735a.h> 16 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 17 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 34 wcd9385: audio-codec-1 { 35 compatible = "qcom,wcd9385-codec"; 36 pinctrl-names = "default", "sleep"; 37 pinctrl-0 = <&wcd_reset_n>, <&us_euro_hs_sel>; 38 pinctrl-1 = <&wcd_reset_n_sleep>, <&us_euro_hs_sel>; [all …]
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D | sm8650-qrd.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 6 /dts-v1/; 8 #include <dt-bindings/leds/common.h> 9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 22 compatible = "qcom,sm8650-qrd", "qcom,sm8650"; 30 stdout-path = "serial0:115200n8"; 33 gpio-keys { 34 compatible = "gpio-keys"; 36 pinctrl-0 = <&volume_up_n>; 37 pinctrl-names = "default"; [all …]
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/linux-6.12.1/drivers/net/wireless/ath/ath9k/ |
D | xmit.c | 2 * Copyright (c) 2008-2011 Atheros Communications Inc. 17 #include <linux/dma-mapping.h> 33 #define TIME_SYMBOLS_HALFGI(t) (((t) * 5 - 4) / 18) 35 #define NUM_SYMBOLS_PER_USEC_HALFGI(_usec) (((_usec*5)-4)/18) 49 { 104, 216 }, /* 3: 16-QAM 1/2 */ 50 { 156, 324 }, /* 4: 16-QAM 3/4 */ 51 { 208, 432 }, /* 5: 64-QAM 2/3 */ 52 { 234, 486 }, /* 6: 64-QAM 3/4 */ 53 { 260, 540 }, /* 7: 64-QAM 5/6 */ 64 struct ath_tx_status *ts, int txok); [all …]
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D | dynack.c | 27 * ath_dynack_get_max_to - set max timeout according to channel width 33 const struct ath9k_channel *chan = ah->curchan; in ath_dynack_get_max_to() 48 * ath_dynack_ewma - EWMA (Exponentially Weighted Moving Average) calculation 53 return (new * (EWMA_DIV - EWMA_LEVEL) + in ath_dynack_ewma() 60 * ath_dynack_get_sifs - get sifs time based on phy used 70 if (IS_CHAN_QUARTER_RATE(ah->curchan)) in ath_dynack_get_sifs() 72 else if (IS_CHAN_HALF_RATE(ah->curchan)) in ath_dynack_get_sifs() 81 * ath_dynack_bssidmask - filter out ACK frames based on BSSID mask 91 if ((common->macaddr[i] & common->bssidmask[i]) != in ath_dynack_bssidmask() 92 (mac[i] & common->bssidmask[i])) in ath_dynack_bssidmask() [all …]
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/linux-6.12.1/drivers/net/vmxnet3/ |
D | vmxnet3_defs.h | 4 * Copyright (C) 2008-2024, VMware, Inc. All Rights Reserved. 18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 23 * Maintained by: pv-drivers@vmware.com 55 VMXNET3_REG_TXPROD = 0x600, /* Tx Producer Index */ 62 VMXNET3_REG_LB_TXPROD = 0x1000, /* Tx Producer Index */ 73 #define VMXNET3_REG_ALIGN 8 /* All registers are 8-byte aligned. */ 133 * Little Endian layout of bitfields - 139 * Big Endian layout of bitfields - 264 u64 tsi:1; //bit to indicate to set ts 270 struct Vmxnet3TSInfo ts; member [all …]
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/linux-6.12.1/drivers/net/wireless/quantenna/qtnfmac/pcie/ |
D | topaz_pcie.c | 1 // SPDX-License-Identifier: GPL-2.0+ 103 static void qtnf_deassert_intx(struct qtnf_pcie_topaz_state *ts) in qtnf_deassert_intx() argument 105 void __iomem *reg = ts->base.sysctl_bar + TOPAZ_PCIE_CFG0_OFFSET; in qtnf_deassert_intx() 113 static inline int qtnf_topaz_intx_asserted(struct qtnf_pcie_topaz_state *ts) in qtnf_topaz_intx_asserted() argument 115 void __iomem *reg = ts->base.sysctl_bar + TOPAZ_PCIE_CFG0_OFFSET; in qtnf_topaz_intx_asserted() 121 static void qtnf_topaz_reset_ep(struct qtnf_pcie_topaz_state *ts) in qtnf_topaz_reset_ep() argument 124 TOPAZ_LH_IPC4_INT(ts->base.sysctl_bar)); in qtnf_topaz_reset_ep() 126 pci_restore_state(ts->base.pdev); in qtnf_topaz_reset_ep() 129 static void setup_rx_irqs(struct qtnf_pcie_topaz_state *ts) in setup_rx_irqs() argument 131 void __iomem *reg = PCIE_DMA_WR_DONE_IMWR_ADDR_LOW(ts->base.dmareg_bar); in setup_rx_irqs() [all …]
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/linux-6.12.1/drivers/ata/ |
D | ahci_dwc.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 25 #define DRV_NAME "ahci-dwc" 95 /* Baikal-T1 AHCI SATA specific registers */ 127 struct ahci_dwc_host_priv *dpriv = hpriv->plat_data; in ahci_bt1_init() 134 dev_err(&dpriv->pdev->dev, "No system clocks specified\n"); in ahci_bt1_init() 135 return -EINVAL; in ahci_bt1_init() 145 dev_err(&dpriv->pdev->dev, "Couldn't assert the resets\n"); in ahci_bt1_init() 151 dev_err(&dpriv->pdev->dev, "Couldn't de-assert the resets\n"); in ahci_bt1_init() 163 dpriv = devm_kzalloc(&pdev->dev, sizeof(*dpriv), GFP_KERNEL); in ahci_dwc_get_resources() 165 return ERR_PTR(-ENOMEM); in ahci_dwc_get_resources() [all …]
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/linux-6.12.1/arch/arm/boot/dts/microchip/ |
D | at91sam9x5ek.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * at91sam9x5ek.dtsi - Device Tree file for AT91SAM9x5CM Base board 11 model = "Atmel AT91SAM9X5-EK"; 16 stdout-path = "serial0:115200n8"; 20 compatible = "atmel,sam9x5-wm8731-audio"; 24 atmel,audio-routing = 30 atmel,ssc-controller = <&ssc0>; 31 atmel,audio-codec = <&wm8731>; 36 atmel,adc-ts-wires = <4>; 37 atmel,adc-ts-pressure-threshold = <10000>; [all …]
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/linux-6.12.1/drivers/net/ethernet/intel/ixgbe/ |
D | ixgbe_ptp.c | 1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright(c) 1999 - 2018 Intel Corporation. */ 30 * Period * [ 2 ^ ( MaxWidth - PeriodWidth ) ] 47 * +--------------+ +--------------+ 49 * *--------------+ +--------------+ 52 * +--------------+ +--------------+ 54 * *--------------+ +--------------+ 58 * 2^36 * 10^-9 / 60 = 1.14 minutes or 69 seconds 61 * 2^43 * 10^-9 / 3600 = 2.4 hours 89 * represents units of 2^-32 nanoseconds, and uses 31 bits for this, with the [all …]
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/linux-6.12.1/drivers/net/can/spi/mcp251xfd/ |
D | mcp251xfd-tef.c | 1 // SPDX-License-Identifier: GPL-2.0 3 // mcp251xfd - Microchip MCP251xFD Family CAN controller driver 6 // Marc Kleine-Budde <kernel@pengutronix.de> 31 err = regmap_read(priv->map_reg, MCP251XFD_REG_TEFUA, &tef_ua); in mcp251xfd_tef_tail_get_from_chip() 54 netdev_err(priv->ndev, in mcp251xfd_check_tef_tail() 57 return -EILSEQ; in mcp251xfd_check_tef_tail() 68 struct net_device_stats *stats = &priv->ndev->stats; in mcp251xfd_handle_tefif_one() 76 hw_tef_obj->flags); in mcp251xfd_handle_tefif_one() 77 tef_tail_masked = priv->tef->tail & in mcp251xfd_handle_tefif_one() 81 * bits of a FIFOSTA register, here the TX FIFO tail index in mcp251xfd_handle_tefif_one() [all …]
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/linux-6.12.1/arch/arm/boot/dts/cirrus/ |
D | ep93xx-ts7250.dts | 1 // SPDX-License-Identifier: GPL-2.0 5 /dts-v1/; 10 model = "TS-7250 SBC"; 11 #address-cells = <1>; 12 #size-cells = <1>; 25 compatible = "gpio-leds"; 26 led-0 { 29 linux,default-trigger = "heartbeat"; 33 led-1 { 42 nand-controller@60000000 { [all …]
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/linux-6.12.1/Documentation/netlink/specs/ |
D | ethtool.yaml | 1 # SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 5 protocol: genetlink-legacy 10 - 11 name: udp-tunnel-type 12 enum-name: 14 entries: [ vxlan, geneve, vxlan-gpe ] 15 - 19 - 20 name: header-flags 22 entries: [ compact-bitsets, omit-reply, stats ] [all …]
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/linux-6.12.1/arch/arm64/boot/dts/freescale/ |
D | imx8ulp-evk.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 12 compatible = "fsl,imx8ulp-evk", "fsl,imx8ulp"; 15 stdout-path = &lpuart5; 23 reserved-memory { 24 #address-cells = <2>; 25 #size-cells = <2>; 29 compatible = "shared-dma-pool"; 32 linux,cma-default; 35 m33_reserved: noncacheable-section@a8600000 { [all …]
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/linux-6.12.1/arch/arm64/boot/dts/rockchip/ |
D | rk3588-extra.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include "rk3588-base.dtsi" 7 #include "rk3588-extra-pinctrl.dtsi" 11 compatible = "rockchip,rk3588-dwc3", "snps,dwc3"; 16 clock-names = "ref_clk", "suspend_clk", "bus_clk"; 19 phy-names = "usb2-phy", "usb3-phy"; 21 power-domains = <&power RK3588_PD_USB>; 24 snps,dis-u2-freeclk-exists-quirk; 25 snps,dis-del-phy-power-chg-quirk; 26 snps,dis-tx-ipgap-linecheck-quirk; [all …]
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/linux-6.12.1/drivers/net/ethernet/cadence/ |
D | macb_ptp.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2017 Cadence Design Systems - https://www.cadence.com 26 #define GEM_PTP_TIMER_NAME "gem-ptp-timer" 31 if (bp->hw_dma_cap == HW_DMA_CAP_PTP) in macb_ptp_desc() 34 if (bp->hw_dma_cap == HW_DMA_CAP_64B_PTP) in macb_ptp_desc() 41 static int gem_tsu_get_time(struct ptp_clock_info *ptp, struct timespec64 *ts, in gem_tsu_get_time() argument 49 spin_lock_irqsave(&bp->tsu_clk_lock, flags); in gem_tsu_get_time() 59 /* if so, use later read & re-read seconds in gem_tsu_get_time() 63 ts->tv_nsec = gem_readl(bp, TN); in gem_tsu_get_time() 68 ts->tv_nsec = first; in gem_tsu_get_time() [all …]
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