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/linux-6.12.1/Documentation/devicetree/bindings/net/
Dsnps,dwmac.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Torgue <alexandre.torgue@foss.st.com>
11 - Giuseppe Cavallaro <peppe.cavallaro@st.com>
12 - Jose Abreu <joabreu@synopsys.com>
15 # will be able to report a warning when we have that compatible, since
16 # we will validate the node thanks to the select, but won't report it
23 - snps,dwmac
24 - snps,dwmac-3.40a
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Dintel,dwmac-plat.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/intel,dwmac-plat.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vineetha G. Jaya Kumaran <vineetha.g.jaya.kumaran@intel.com>
17 - intel,keembay-dwmac
19 - compatible
22 - $ref: snps,dwmac.yaml#
27 - items:
28 - enum:
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Dintel,ixp4xx-hss.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/net/intel,ixp4xx-hss.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Linus Walleij <linus.walleij@linaro.org>
14 The Intel IXP4xx HSS makes use of the IXP4xx NPE (Network
15 Processing Engine) and the IXP4xx Queue Manager to process
20 const: intel,ixp4xx-hss
26 intel,npe-handle:
27 $ref: /schemas/types.yaml#/definitions/phandle-array
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/linux-6.12.1/Documentation/networking/devlink/
Dmlx5.rst1 .. SPDX-License-Identifier: GPL-2.0
13 .. list-table:: Generic parameters implemented
15 * - Name
16 - Mode
17 - Validation
18 * - ``enable_roce``
19 - driverinit
20 - Type: Boolean
26 * - ``io_eq_size``
27 - driverinit
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/linux-6.12.1/Documentation/networking/device_drivers/ethernet/huawei/
Dhinic.rst1 .. SPDX-License-Identifier: GPL-2.0
11 The driver supports a range of link-speed devices (10GbE, 25GbE, 40GbE, etc.).
14 Some HiNIC devices support SR-IOV. This driver is used for Physical Function
17 HiNIC devices support MSI-X interrupt vector for each Tx/Rx queue and
21 TCP Transmit Segmentation Offload(TSO), Receive-Side Scaling(RSS) and
28 19e5:1822 - HiNIC PF
34 hinic_dev - Implement a Logical Network device that is independent from
37 hinic_hwdev - Implement the HW details of the device and include the components
55 Asynchronous Event Queues(AEQs) - The event queues for receiving messages from
58 Application Programmable Interface commands(API CMD) - Interface for sending
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/linux-6.12.1/Documentation/networking/device_drivers/ethernet/intel/
Didpf.rst1 .. SPDX-License-Identifier: GPL-2.0+
17 For questions related to hardware requirements, refer to the documentation
18 supplied with your Intel adapter. All hardware requirements listed apply to use
24 For information on how to identify your adapter, and for the latest Intel
25 network drivers, refer to the Intel Support website:
33 -------
42 ---------------------
43 Link messages will not be displayed to the console if the distribution is
44 restricting system messages. In order to see network driver link messages on
45 your console, set dmesg to eight by entering the following::
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Di40e.rst1 .. SPDX-License-Identifier: GPL-2.0+
8 Copyright(c) 1999-2018 Intel Corporation.
13 - Overview
14 - Identifying Your Adapter
15 - Intel(R) Ethernet Flow Director
16 - Additional Configurations
17 - Known Issues
18 - Support
25 For questions related to hardware requirements, refer to the documentation
26 supplied with your Intel adapter. All hardware requirements listed apply to use
[all …]
/linux-6.12.1/drivers/net/wireless/ralink/rt2x00/
Drt2x00queue.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 Copyright (C) 2004 - 2010 Ivo van Doorn <IvDoorn@gmail.com>
21 * Ralink PCI devices demand the Frame size to be a multiple of 128 bytes,
23 * 2432 makes sense since it is big enough to contain the maximum fragment
24 * size according to the ieee802.11 specs.
42 * @QID_OTHER: None of the above (don't use, only present for completeness)
43 * @QID_BEACON: Beacon queue (value unspecified, don't send it to device)
44 * @QID_ATIM: Atim queue (value unspecified, don't send it to device)
63 * @SKBDESC_DMA_MAPPED_TX: &skb_dma field has been mapped for TX
67 * don't try to pass it back.
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/linux-6.12.1/drivers/net/ethernet/intel/ixgbe/
Dixgbe_lib.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
9 * ixgbe_cache_ring_dcb_sriov - Descriptor ring to register mapping for SR-IOV
10 * @adapter: board private structure to initialize
12 * Cache the descriptor ring offsets for SR-IOV to the assigned rings. It
13 * will also try to cache the proper offsets if RSS/FCoE are enabled along
20 struct ixgbe_ring_feature *fcoe = &adapter->ring_feature[RING_F_FCOE]; in ixgbe_cache_ring_dcb_sriov()
22 struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ]; in ixgbe_cache_ring_dcb_sriov()
25 u8 tcs = adapter->hw_tcs; in ixgbe_cache_ring_dcb_sriov()
32 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) in ixgbe_cache_ring_dcb_sriov()
[all …]
Dixgbe_dcb_82599.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
10 * ixgbe_dcb_config_rx_arbiter_82599 - Config Rx Data arbiter
11 * @hw: pointer to hardware structure
16 * @prio_tc: priority to tc assignments indexed by priority
39 /* Map all traffic classes to their UP */ in ixgbe_dcb_config_rx_arbiter_82599()
70 * ixgbe_dcb_config_tx_desc_arbiter_82599 - Config Tx Desc. arbiter
71 * @hw: pointer to hardware structure
77 * Configure Tx Descriptor Arbiter and credits for each traffic class.
88 /* Clear the per-Tx queue credits; we use per-TC instead */ in ixgbe_dcb_config_tx_desc_arbiter_82599()
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/linux-6.12.1/Documentation/networking/device_drivers/ethernet/freescale/
Ddpaa.rst1 .. SPDX-License-Identifier: GPL-2.0
8 - Madalin Bucur <madalin.bucur@nxp.com>
9 - Camelia Groza <camelia.groza@nxp.com>
13 - DPAA Ethernet Overview
14 - DPAA Ethernet Supported SoCs
15 - Configuring DPAA Ethernet in your kernel
16 - DPAA Ethernet Frame Processing
17 - DPAA Ethernet Features
18 - DPAA IRQ Affinity and Receive Side Scaling
19 - Debugging
[all …]
/linux-6.12.1/drivers/net/wireless/intel/iwlwifi/mvm/
Dsta.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2012-2014, 2018-2024 Intel Corporation
4 * Copyright (C) 2013-2014 Intel Mobile Communications GmbH
5 * Copyright (C) 2015-2016 Intel Deutschland GmbH
14 #include "iwl-trans.h" /* for IWL_MAX_TID_COUNT */
15 #include "fw-api.h" /* IWL_STATION_COUNT_MAX */
22 * DOC: DQA - Dynamic Queue Allocation -introduction
25 * driver to allow dynamic allocation of queues on-demand, rather than allocate
26 * them statically ahead of time. Ideally, we would like to allocate one queue
27 * per RA/TID, thus allowing an AP - for example - to send BE traffic to STA2
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/linux-6.12.1/drivers/net/ethernet/intel/idpf/
Didpf_txrx.h1 /* SPDX-License-Identifier: GPL-2.0-only */
29 * to achieve BufQ descriptors aligned to 32
67 * queues. E.g.: If you have two buffer queues of 512 descriptors and buffers,
70 * number of buffer queues to calculate how many descriptors each buffer queue
74 * happen is that if hardware gets a chance to post more than ring wrap of
77 * be gone forever and SW has no reasonable way to tell that this has happened.
79 * still waiting for descriptor to be done, stalling forever.
83 #define IDPF_RX_BUFQ_WORKING_SET(rxq) ((rxq)->desc_count - 1)
87 if (unlikely(++(ntc) == (rxq)->desc_count)) { \
95 if (unlikely(++(idx) == (q)->desc_count)) \
[all …]
Didpf.h1 /* SPDX-License-Identifier: GPL-2.0-only */
25 #define GETMAXVAL(num_bits) GENMASK((num_bits) - 1, 0)
31 #define IDPF_NUM_DFLT_MBX_Q 2 /* includes both TX and RX */
33 #define IDPF_DFLT_MBX_ID -1
34 /* maximum number of times to try before resetting mailbox */
37 ((IDPF_CTLQ_MAX_BUF_LEN - (struct_sz)) / (chunk_sz))
64 * enum idpf_state - State machine to handle bring up
68 * @__IDPF_STATE_LAST: Must be last, used to determine size
78 * enum idpf_flags - Hard reset causes.
98 * enum idpf_cap_field - Offsets into capabilities struct for specific caps
[all …]
/linux-6.12.1/Documentation/networking/device_drivers/ethernet/google/
Dgve.rst1 .. SPDX-License-Identifier: GPL-2.0+
9 The GVE driver binds to a single PCI device id used by the virtual
12 +--------------+----------+---------+
16 +--------------+----------+---------+
18 +--------------+----------+---------+
19 |Sub-vendor ID | `0x1AE0` | Google |
20 +--------------+----------+---------+
21 |Sub-device ID | `0x0058` | |
22 +--------------+----------+---------+
24 +--------------+----------+---------+
[all …]
/linux-6.12.1/drivers/net/wireless/intel/iwlegacy/
Dprph.h8 * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved.
20 * along with this program; if not, write to the Free Software
29 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
33 * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved.
36 * Redistribution and use in source and binary forms, with or without
47 * contributors may be used to endorse or promote products derived
52 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
56 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
59 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
106 * processor is sleeping (e.g. for periodic power-saving shutdowns of radio).
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/linux-6.12.1/arch/arm64/boot/dts/st/
Dstm32mp253.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
11 compatible = "arm,cortex-a35";
14 enable-method = "psci";
15 power-domains = <&CPU_PD1>;
16 power-domain-names = "psci";
20 arm-pmu {
23 interrupt-affinity = <&cpu0>, <&cpu1>;
27 CPU_PD1: power-domain-cpu1 {
28 #power-domain-cells = <0>;
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/linux-6.12.1/drivers/net/wireless/ath/ath5k/
Dqcu.c2 * Copyright (c) 2004-2008 Reyk Floeter <reyk@openbsd.org>
3 * Copyright (c) 2006-2008 Nick Kossifidis <mickflemm@gmail.com>
5 * Permission to use, copy, modify, and distribute this software for any
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
33 * Here we setup parameters for the 12 available TX queues. Note that
35 * basically we have 10 queues to play with. Each queue has a matching
37 * can be mapped to a single DCU that controls the various DFS parameters
38 * for the various queues. In our setup we have a 1:1 mapping between QCUs
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/linux-6.12.1/drivers/net/ethernet/chelsio/cxgb4vf/
Dadapter.h2 * This file is part of the Chelsio T4 PCI-E SR-IOV Virtual Function Ethernet
5 * Copyright (c) 2009-2010 Chelsio Communications, Inc. All rights reserved.
7 * This software is available to you under a choice of one of two
8 * licenses. You may choose to be licensed under the terms of the GNU
13 * Redistribution and use in source and binary forms, with or
17 * - Redistributions of source code must retain the above
21 * - Redistributions in binary form must reproduce the above
27 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
32 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
62 * MSI-X interrupt index usage.
[all …]
/linux-6.12.1/Documentation/networking/
Dnapi.rst1 .. SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
14 The host then schedules a NAPI instance to process the events.
19 but there is an option to use :ref:`separate kernel threads<threaded>`
23 of event (packet Rx and Tx) processing.
30 of the NAPI instance while the method is the driver-specific event
31 handler. The method will typically free Tx packets that have been
37 -----------
40 from the system. The instances are attached to the netdevice passed
46 to not be invoked. napi_disable() waits for ownership of the NAPI
47 instance to be released.
[all …]
/linux-6.12.1/drivers/net/ethernet/sfc/siena/
Dnet_driver.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2005-2006 Fen Systems Ltd.
5 * Copyright 2005-2013 Solarflare Communications Inc.
61 /* Checksum generation is a per-queue option in hardware, so each
62 * queue visible to the networking core is backed by two hardware TX
63 * queues. */
68 #define EFX_TXQ_TYPE_HIGHPRI 4 /* High-priority (for TC) */
70 /* HIGHPRI is Siena-only, and INNER_CSUM is EF10, so no need for both */
83 /* Size of an RX scatter buffer. Small enough to pack 2 into a 4K page,
86 #define EFX_RX_USR_BUF_SIZE (2048 - 256)
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/linux-6.12.1/drivers/net/ethernet/amd/xgbe/
Dxgbe-main.c4 * This file is available to you under your choice of the following two
9 * Copyright (c) 2014-2016 Advanced Micro Devices, Inc.
28 * Inc. unless otherwise expressly agreed to in writing between Synopsys
34 * granted, free of charge, to any person obtaining a copy of this software
35 * annotated with this license and the Software, to deal in the Software
36 * without restriction, including without limitation the rights to use,
38 * of the Software, and to permit persons to whom the Software is furnished
39 * to do so, subject to the following conditions:
46 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
49 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
[all …]
/linux-6.12.1/arch/arm64/boot/dts/qcom/
Dsa8540p-ride.dts1 // SPDX-License-Identifier: BSD-3-Clause
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 #include "sa8540p-pmics.dtsi"
17 compatible = "qcom,sa8540p-ride", "qcom,sa8540p";
29 stdout-path = "serial0:115200n8";
34 regulators-0 {
35 compatible = "qcom,pm8150-rpmh-regulators";
36 qcom,pmic-id = "a";
[all …]
/linux-6.12.1/drivers/net/ethernet/sfc/
Dnet_driver.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2005-2006 Fen Systems Ltd.
5 * Copyright 2005-2013 Solarflare Communications Inc.
63 /* Checksum generation is a per-queue option in hardware, so each
64 * queue visible to the networking core is backed by two hardware TX
65 * queues. */
83 /* Size of an RX scatter buffer. Small enough to pack 2 into a 4K page,
86 #define EFX_RX_USR_BUF_SIZE (2048 - 256)
89 * of every buffer. Otherwise, we just need to ensure 4-byte
98 /* Non-standard XDP_PACKET_HEADROOM and tailroom to satisfy XDP_REDIRECT and
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/linux-6.12.1/drivers/net/ethernet/chelsio/cxgb3/
Dsge.c2 * Copyright (c) 2005-2008 Chelsio, Inc. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
10 * Redistribution and use in source and binary forms, with or
14 * - Redistributions of source code must retain the above
18 * - Redistributions in binary form must reproduce the above
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
38 #include <linux/dma-mapping.h>
58 * Page chunk size for FL0 buffers if FL0 is to be populated with page chunks.
[all …]

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