chelsio/cxgb4vf/adapter.h

2  * This file is part of the Chelsio T4 PCI-E SR-IOV Virtual Function Ethernet
5  * Copyright (c) 2009-2010 Chelsio Communications, Inc. All rights reserved.
7  * This software is available to you under a choice of one of two
8  * licenses.  You may choose to be licensed under the terms of the GNU
13  *     Redistribution and use in source and binary forms, with or
17  *      - Redistributions of source code must retain the above
21  *      - Redistributions in binary form must reproduce the above
27  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
32  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
62 	 * MSI-X interrupt index usage.
64 	MSIX_FW		= 0,		/* MSI-X index for firmware Q */
65 	MSIX_IQFLINT	= 1,		/* MSI-X index base for Ingress Qs */
70 	 * The maximum number of Ingress and Egress Queues is determined by
72 	 * ancillary queues.  Each "Queue Set" requires one Ingress Queue
73 	 * for RX Packet Ingress Event notifications and two Egress Queues for
74 	 * a Free List and an Ethernet TX list.
90  * Per-"port" information.  This is really per-Virtual Interface information
91  * but the use of the "port" nomanclature makes it easier to go back and forth
112  * queues are organized into "Queue Sets" with one ingress and one egress
114  * (Virtual Interfaces).  One extra ingress queue is used to receive
116  * use here are really "Relative Queue IDs" which are returned as part of the
117  * firmware command to allocate queues.  These queue IDs are relative to the
118  * absolute Queue ID base of the section of the Queue ID space allocated to
123  * SGE free-list queue state.
136 	 * Write-once/infrequently fields.
137 	 * -------------------------------
177 	 * Write-once/infrequently fields.
178 	 * -------------------------------
206 	unsigned long rx_drops;		/* # of packets dropped due to no mem */
220  * with the hardware status of a TX Queue which is a circular ring of hardware
221  * TX Descriptors.  For convenience, it also contains a pointer to a parallel
227 	 * Egress Queues are measured in units of SGE_EQ_IDXSIZE by the
234 	unsigned int in_use;		/* # of in-use TX descriptors */
242 	 * Write-once/infrequently fields.
243 	 * -------------------------------
246 	unsigned int cntxt_id;		/* SGE relative QID for the TX Q */
247 	unsigned int abs_id;		/* SGE absolute QID for the TX Q */
248 	struct tx_desc *desc;		/* address of HW TX descriptor ring */
249 	struct tx_sw_desc *sdesc;	/* address of SW TX descriptor ring */
260 	struct sge_txq q;		/* SGE TX Queue */
261 	struct netdev_queue *txq;	/* associated netdev TX queue */
263 	unsigned long tx_cso;		/* # of TX checksum offloads */
264 	unsigned long vlan_ins;		/* # of TX VLAN insertions */
279 	 * Extra ingress queues for asynchronous firmware events and
288 	 * State for managing "starving Free Lists" -- Free Lists which have
289 	 * fallen below a certain threshold of buffers available to the
290 	 * hardware and attempts to refill them up to that threshold have
292 	 * make periodic attempts to refill these starving Free Lists ...
298 	 * State for cleaning up completed TX descriptors.
303 	 * Write-once/infrequently fields.
304 	 * -------------------------------
309 	u16 ethtxq_rover;		/* Tx queue to clean up next */
322 	 * Reverse maps from Absolute Queue IDs to associated queue pointers.
326 	 * subtracting off the Base Queue ID and then use a Relative Queue ID
327 	 * indexed table to get the pointer to the corresponding software
337  * Utility macros to convert Absolute- to Relative-Queue indices and Egress-
338  * and Ingress-Queues.  The EQ_MAP() and IQ_MAP() macros which provide
339  * pointers to Ingress- and Egress-Queues can be used as both L- and R-values
341 #define EQ_IDX(s, abs_id) ((unsigned int)((abs_id) - (s)->egr_base))
342 #define IQ_IDX(s, abs_id) ((unsigned int)((abs_id) - (s)->ingr_base))
344 #define EQ_MAP(s, abs_id) ((s)->egr_map[EQ_IDX(s, abs_id)])
345 #define IQ_MAP(s, abs_id) ((s)->ingr_map[IQ_IDX(s, abs_id)])
348  * Macro to iterate across Queue Sets ("rxq" is a historic misnomer).
351 	for (iter = 0; iter < (sge)->ethqsets; iter++)
364  * Per-"adapter" (Virtual Function) information.
424  * t4_read_reg - read a HW register
428  * Returns the 32-bit value of the given HW register.
432 	return readl(adapter->regs + reg_addr);  in t4_read_reg()
436  * t4_write_reg - write a HW register
439  * @val: the value to write
441  * Write a 32-bit value into the given HW register.
445 	writel(val, adapter->regs + reg_addr);  in t4_write_reg()
462  * t4_read_reg64 - read a 64-bit HW register
466  * Returns the 64-bit value of the given HW register.
470 	return readq(adapter->regs + reg_addr);  in t4_read_reg64()
474  * t4_write_reg64 - write a 64-bit HW register
477  * @val: the value to write
479  * Write a 64-bit value into the given HW register.
484 	writeq(val, adapter->regs + reg_addr);  in t4_write_reg64()
488  * port_name - return the string name of a port
496 	return adapter->port[pidx]->name;  in port_name()
500  * t4_os_set_hw_addr - store a port's MAC address in SW
511 	eth_hw_addr_set(adapter->port[pidx], hw_addr);  in t4_os_set_hw_addr()
515  * netdev2pinfo - return the port_info structure associated with a net_device
526  * adap2pinfo - return the port_info of a port
534 	return netdev_priv(adapter->port[pidx]);  in adap2pinfo()
538  * netdev2adap - return the adapter structure associated with a net_device
545 	return netdev2pinfo(dev)->adapter;  in netdev2adap()
550  * is "contracted" to provide for the common code.